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23. Word Clock<br />
23.1 Word Clock Input and Output<br />
SteadyClock guarantees an excellent performance in all clock modes. Based on the highly efficient<br />
jitter suppression, the <strong>HDSP</strong> <strong>AES</strong>-<strong>32</strong> refreshes and cleans up any clock signal, and provides<br />
it as reference clock at the BNC output (see chapter 30.6).<br />
Input<br />
The <strong>HDSP</strong> <strong>AES</strong>-<strong>32</strong>'s transformer isolated word clock input is active when Pref. Sync Ref in the<br />
Settings dialog has been switched to Word Clock, the clock mode AutoSync has been activated,<br />
and a valid word clock signal is present. The signal at the BNC input can be Single, Double<br />
or Quad Speed, the <strong>HDSP</strong> <strong>AES</strong>-<strong>32</strong> automatically adapts to it. As soon as a valid signal is<br />
detected, the Settings dialog shows either Lock or Sync (see chapter 30.2).<br />
Thanks to <strong>RME</strong>'s Signal Adaptation Circuit, the word clock input still works correctly even with<br />
heavily mis-shaped, dc-prone, too small or overshoot-prone signals. Thanks to automatic signal<br />
centering, 300 mV (0.3V) input level are sufficient in principle. An additional hysteresis reduces<br />
sensitivity to 1.0 V, so that over- and undershoots and high frequency disturbances don't cause<br />
a wrong trigger.<br />
The word clock input is shipped as high impedance type (not terminated). An internal jumper<br />
besides the BNC socket allows to activate proper termination (75 Ohm).<br />
Output<br />
The word clock output of the <strong>HDSP</strong> <strong>AES</strong>-<strong>32</strong> is constantly active, providing the current sample<br />
frequency as word clock signal. As a result, in Master mode the provided word clock is defined<br />
by the currently used software or the DDS dialog. In Slave mode the provided frequency is identical<br />
to the one present at the currently chosen clock input. When the current clock signal fails,<br />
the <strong>HDSP</strong> <strong>AES</strong>-<strong>32</strong> switches to Master mode and adjusts itself to the next, best matching frequency<br />
(44.1 kHz, 48 kHz etc.).<br />
Selecting the options Double Wire or Quad Wire in the Settings dialog the output frequency is<br />
changed to always be the same as the sample rate on the <strong>AES</strong> outputs. At 192 kHz operation<br />
with activated Double Wire operation the <strong>AES</strong>-<strong>32</strong> will generate a word clock signal of 96 kHz.<br />
The received word clock signal can be distributed to other devices by using the word clock output.<br />
With this the usual T-adapter can be avoided, and the <strong>HDSP</strong> <strong>AES</strong>-<strong>32</strong> operates as Signal<br />
Refresher. This kind of operation is highly recommended, because<br />
• input and output are phase-locked and in phase (0°) to each other<br />
• SteadyClock removes nearly all jitter from the input signal<br />
• the exceptional input (1 Vpp sensitivity instead of the usual 2.5 Vpp, dc cut, Signal Adaptation<br />
Circuit) plus SteadyClock guarantee a secure function even with highly critical word<br />
clock signals<br />
Thanks to a low impedance, but short circuit proof output, the <strong>HDSP</strong> <strong>AES</strong>-<strong>32</strong> delivers 4 Vpp to<br />
75 Ohms. For wrong termination with 2 x 75 Ohms (37.5 Ohms), there are still 3.3 Vpp fed into<br />
the network.<br />
<strong>User's</strong> <strong>Guide</strong> <strong>HDSP</strong> <strong>AES</strong>-<strong>32</strong> © <strong>RME</strong> 41