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3GPP TS 36.212, "Multiplexing and channel coding"

3GPP TS 36.212, "Multiplexing and channel coding"

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Release 8<br />

15<br />

<strong>3GPP</strong> <strong>TS</strong> <strong>36.212</strong> V8.1.0 (2007-11)<br />

5.1.4 Rate matching<br />

5.1.4.1 Rate matching for turbo coded transport <strong>channel</strong>s<br />

The rate matching for turbo coded transport <strong>channel</strong>s is defined per coded block <strong>and</strong> consists of interleaving the three<br />

(0)<br />

k<br />

(1)<br />

k<br />

information bit streams d , d <strong>and</strong> d<br />

(2)<br />

k<br />

, followed by the collection of bits <strong>and</strong> the generation of a circular buffer as<br />

depicted in Figure 5.1.4-1. The output bits for each code block are transmitted as described in subclause 5.1.4.1.2.<br />

(0)<br />

d k<br />

(0)<br />

v k<br />

(1)<br />

d k<br />

(1)<br />

v k<br />

w k<br />

e k<br />

(2)<br />

d k<br />

(2)<br />

v k<br />

The bit stream<br />

(0)<br />

d<br />

k<br />

Figure 5.1.4-1. Rate matching for turbo coded transport <strong>channel</strong>s<br />

is interleaved according to the sub-block interleaver defined in subclause 5.1.4.1.1 with an output<br />

(0) (0) (0) (0)<br />

, v KΠ −1<br />

sequence defined as v0 v1<br />

, v2<br />

,..., <strong>and</strong> where K Π is defined in subclause 5.1.4.1.1.<br />

The bit stream<br />

(1)<br />

d<br />

k<br />

is interleaved according to the sub-block interleaver defined in subclause 5.1.4.1.1 with an output<br />

(1) (1) (1) (1)<br />

, v KΠ −1<br />

sequence defined as v<br />

0<br />

v1<br />

, v2<br />

,..., .<br />

The bit stream<br />

(2)<br />

d<br />

k<br />

is interleaved according to the sub-block interleaver defined in subclause 5.1.4.1.1 with an output<br />

(2) (2) (2) (2)<br />

, v KΠ −1<br />

sequence defined as v<br />

0<br />

v1<br />

, v2<br />

,..., .<br />

The sequence of bits e k for transmission is generated according to subclause 5.1.4.1.2.<br />

5.1.4.1.1 Sub-block interleaver<br />

The bits input to the block interleaver are denoted by d0 , d1<br />

, d<br />

2<br />

,..., d<br />

bit sequence from the block interleaver is derived as follows:<br />

TC<br />

subblock<br />

TC<br />

subblock −<br />

( i)<br />

( i)<br />

( i)<br />

( i)<br />

D− 1<br />

, where D is the number of bits. The output<br />

(1) Assign C = 32 to be the number of columns of the matrix. The columns of the matrix are numbered 0, 1,<br />

2,…, C 1from left to right.<br />

(2) Determine the number of rows of the matrix R subblock<br />

TC , by finding minimum integer<br />

TC TC<br />

( R subblock C )<br />

D ≤ ×<br />

subblock<br />

TC<br />

subblock<br />

The rows of rectangular matrix are numbered 0, 1, 2,…, R −1from top to bottom.<br />

TC<br />

R<br />

subblock<br />

such that:<br />

<strong>3GPP</strong>

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