dsPIC30F2010 Data Sheet - Microchip

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DS70118J-page 42 © 2011 Microchip Technology Inc. TABLE 5-2: INTERRUPT CONTROLLER REGISTER MAP SFR Name Addr. Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset State INTCON1 0080 NSTDIS — — — — OVATE OVBTE COVTE — — — MATHERR ADDRERR STKERR OSCFAIL — 0000 0000 0000 0000 INTCON2 0082 ALTIVT DISI — — — — — — — — — — — INT2EP INT1EP INT0EP 0000 0000 0000 0000 IFS0 0084 CNIF MI2CIF SI2CIF NVMIF ADIF U1TXIF U1RXIF SPI1IF T3IF T2IF OC2IF IC2IF T1IF OC1IF IC1IF INT0IF 0000 0000 0000 0000 IFS1 0086 — — — — — — — — INT2IF — — — — IC8IF IC7IF INT1IF 0000 0000 0000 0000 IFS2 0088 — — — — FLTAIF — — QEIIF PWMIF — — — — — — — 0000 0000 0000 0000 IEC0 008C CNIE MI2CIE SI2CIE NVMIE ADIE U1TXIE U1RXIE SPI1IE T3IE T2IE OC2IE IC2IE T1IE OC1IE IC1IE INT0IE 0000 0000 0000 0000 IEC1 008E — — — — — — — — INT2IE — — — — IC8IE IC7IE INT1IE 0000 0000 0000 0000 IEC2 0090 — — — — FLTAIE — — QEIIE PWMIE — — — — — — — 0000 0000 0000 0000 IPC0 0094 — T1IP — OC1IP — IC1IP — INT0IP 0100 0100 0100 0100 IPC1 0096 — T31P — T2IP — OC2IP — IC2IP 0100 0100 0100 0100 IPC2 0098 — ADIP — U1TXIP — U1RXIP — SPI1IP 0100 0100 0100 0100 IPC3 009A — CNIP — MI2CIP — SI2CIP — NVMIP 0100 0100 0100 0100 IPC4 009C — — — — — IC8IP — IC7IP — INT1IP 0100 0100 0100 0100 IPC5 009E — INT2IP — — — — — — — — — — — — 0100 0000 0000 0000 IPC6 00A0 — — — — — — — — — — — — — — — — 0000 0000 0000 0000 IPC7 00A2 — — — — — — — — — — — — — — — — 0000 0000 0000 0000 IPC8 00A4 — — — — — — — — — — — — — — — — 0000 0000 0000 0000 IPC9 00A6 — PWMIP — — — — — — — — — — — — 0000 0000 0000 0000 IPC10 00A8 — FLTAIP — — — — — — — — — QEIIP 0100 0000 0000 0100 IPC11 00AA — — — — — — — — — — — — — — — — 0000 0000 0000 0000 Legend: — = unimplemented bit, read as ‘0’ Note: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields. dsPIC30F2010
dsPIC30F2010 6.0 FLASH PROGRAM MEMORY Note: This data sheet summarizes features of this group of dsPIC30F devices and is not intended to be a complete reference source. For more information on the CPU, peripherals, register descriptions and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “16-bit MCU and DSC Programmer’s Reference Manual” (DS70157). The dsPIC30F family of devices contains internal program Flash memory for executing user code. There are two methods by which the user can program this memory: 1. In-Circuit Serial Programming (ICSP) programming capability 2. Run-Time Self-Programming (RTSP) 6.1 In-Circuit Serial Programming (ICSP) dsPIC30F devices can be serially programmed while in the end application circuit. This is simply done with two lines for Programming Clock and Programming Data (which are named PGC and PGD respectively), and three other lines for Power (VDD), Ground (VSS) and Master Clear (MCLR). This allows customers to manufacture boards with unprogrammed devices, and then program the digital signal controller just before shipping the product. This also allows the most recent firmware or a custom firmware to be programmed. 6.2 Run-Time Self-Programming (RTSP) RTSP is accomplished using TBLRD (table read) and TBLWT (table write) instructions. With RTSP, the user may erase program memory, 32 instructions (96 bytes) at a time and can write program memory data, 32 instructions (96 bytes) at a time. 6.3 Table Instruction Operation Summary The TBLRDL and the TBLWTL instructions are used to read or write to bits of program memory. TBLRDL and TBLWTL can access program memory in Word or Byte mode. The TBLRDH and TBLWTH instructions are used to read or write to bits of program memory. TBLRDH and TBLWTH can access program memory in Word or Byte mode. A 24-bit program memory address is formed using bits of the TBLPAG register and the EA from a W register specified in the table instruction, as shown in Figure 6-1. FIGURE 6-1: ADDRESSING FOR TABLE AND NVM REGISTERS Using Program Counter 0 24 bits Program Counter 0 Using NVMADR Addressing 1/0 NVMADRU Reg NVMADR Reg EA 8 bits 16 bits Working Reg EA Using Table Instruction 1/0 TBLPAG Reg 8 bits 16 bits User/Configuration Space Select 24-bit EA Byte Select © 2011 Microchip Technology Inc. DS70118J-page 43
Page 1 and 2: dsPIC30F2010 Data Sheet High-Perfor
Page 3 and 4: dsPIC30F2010 High-Performance, 16-b
Page 5 and 6: dsPIC30F2010 Pin Diagrams 28-Pin SD
Page 7 and 8: dsPIC30F2010 1.0 DEVICE OVERVIEW No
Page 9 and 10: dsPIC30F2010 Table 1-1 provides a b
Page 11 and 12: dsPIC30F2010 2.0 CPU ARCHITECTURE O
Page 13 and 14: dsPIC30F2010 FIGURE 2-1: PROGRAMMER
Page 15 and 16: dsPIC30F2010 FIGURE 2-2: DSP ENGINE
Page 17 and 18: dsPIC30F2010 The SA and SB bits are
Page 19 and 20: dsPIC30F2010 3.0 MEMORY ORGANIZATIO
Page 21 and 22: dsPIC30F2010 3.1.1 DATA ACCESS FROM
Page 23 and 24: dsPIC30F2010 FIGURE 3-5: DATA SPACE
Page 25 and 26: dsPIC30F2010 FIGURE 3-7: DATA SPACE
Page 27 and 28: dsPIC30F2010 All byte loads into an
Page 29 and 30: © 2011 Microchip Technology Inc. D
Page 31 and 32: dsPIC30F2010 4.0 ADDRESS GENERATOR
Page 33 and 34: dsPIC30F2010 4.2 Modulo Addressing
Page 35 and 36: dsPIC30F2010 4.2.3 MODULO ADDRESSIN
Page 37 and 38: dsPIC30F2010 5.0 INTERRUPTS Note: T
Page 39 and 40: dsPIC30F2010 5.2 Reset Sequence A R
Page 41: dsPIC30F2010 5.4 Interrupt Sequence
Page 45 and 46: dsPIC30F2010 6.6 Programming Operat
Page 49 and 50: dsPIC30F2010 7.0 DATA EEPROM MEMORY
Page 51 and 52: dsPIC30F2010 7.3 Writing to the Dat
Page 53 and 54: dsPIC30F2010 8.0 I/O PORTS Note: Th
Page 57 and 58: dsPIC30F2010 9.0 TIMER1 MODULE Note
Page 59 and 60: dsPIC30F2010 9.4 Timer Interrupt Th
Page 61 and 62: dsPIC30F2010 10.0 TIMER2/3 MODULE N
Page 63 and 64: dsPIC30F2010 FIGURE 10-2: 16-BIT TI
Page 67 and 68: dsPIC30F2010 11.0 INPUT CAPTURE MOD
Page 69 and 70: dsPIC30F2010 11.2 Input Capture Ope
Page 71 and 72: dsPIC30F2010 12.0 OUTPUT COMPARE MO
Page 73 and 74: dsPIC30F2010 12.4.2 PWM PERIOD The
Page 75 and 76: dsPIC30F2010 13.0 QUADRATURE ENCODE
Page 77 and 78: dsPIC30F2010 13.3 Position Measurem
Page 81 and 82: dsPIC30F2010 14.0 MOTOR CONTROL PWM
Page 83 and 84: dsPIC30F2010 14.1 PWM Time Base The
Page 85 and 86: dsPIC30F2010 14.3 Edge-Aligned PWM
Page 87 and 88: dsPIC30F2010 FIGURE 14-4: DEAD-TIME
Page 89 and 90: dsPIC30F2010 14.14 PWM Special Even
Page 91 and 92: dsPIC30F2010 15.0 SPI MODULE Note:
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dsPIC30F2010 15.3 Slave Select Sync
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dsPIC30F2010 16.0 I 2 C MODULE Note
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dsPIC30F2010 16.2 I 2 C Module Addr
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dsPIC30F2010 16.8 Slope Control The
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© 2011 Microchip Technology Inc. D
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dsPIC30F2010 17.0 UNIVERSAL ASYNCHR
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dsPIC30F2010 17.2 Enabling and Sett
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dsPIC30F2010 17.5.2 FRAMING ERROR (
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dsPIC30F2010 18.0 10-BIT HIGH-SPEED
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dsPIC30F2010 18.4 Programming the S
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dsPIC30F2010 TABLE 18-1: 10-BIT A/D
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dsPIC30F2010 18.7.3.3 600 ksps Conf
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dsPIC30F2010 18.13 Configuring Anal
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dsPIC30F2010 19.0 SYSTEM INTEGRATIO
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dsPIC30F2010 FIGURE 19-1: OSCILLATO
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dsPIC30F2010 19.2.3 LP OSCILLATOR C
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dsPIC30F2010 19.3 Reset The dsPIC30
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dsPIC30F2010 19.3.1.1 POR with Long
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dsPIC30F2010 19.4 Watchdog Timer (W
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dsPIC30F2010 20.0 INSTRUCTION SET S
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dsPIC30F2010 TABLE 20-1: Wb Wd Wdo
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dsPIC30F2010 TABLE 20-2: Base Instr
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dsPIC30F2010 TABLE 20-2: Base Instr
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dsPIC30F2010 21.0 DEVELOPMENT SUPPO
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dsPIC30F2010 21.7 MPLAB SIM Softwar
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dsPIC30F2010 22.0 ELECTRICAL CHARAC
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dsPIC30F2010 TABLE 22-4: DC TEMPERA
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dsPIC30F2010 TABLE 22-6: DC CHARACT
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dsPIC30F2010 TABLE 22-8: DC CHARACT
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dsPIC30F2010 TABLE 22-10: DC CHARAC
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dsPIC30F2010 TABLE 22-13: AC CHARAC
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dsPIC30F2010 TABLE 22-16: Clock Osc
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dsPIC30F2010 FIGURE 22-5: RESET, WA
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dsPIC30F2010 FIGURE 22-7: TIMER EXT
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dsPIC30F2010 FIGURE 22-8: TIMERQ (Q
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dsPIC30F2010 FIGURE 22-11: OC/PWM M
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dsPIC30F2010 FIGURE 22-14: QEA/QEB
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dsPIC30F2010 FIGURE 22-16: SPI MODU
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dsPIC30F2010 FIGURE 22-18: SPI MODU
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dsPIC30F2010 TABLE 22-35: SPI MODUL
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dsPIC30F2010 TABLE 22-36: I 2 C BUS
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dsPIC30F2010 TABLE 22-37: I 2 C BUS
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dsPIC30F2010 TABLE 22-38: AC CHARAC
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dsPIC30F2010 FIGURE 22-25: 10-BIT H
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dsPIC30F2010 23.0 PACKAGING INFORMA
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dsPIC30F2010 © 2011 Microchip
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dsPIC30F2010 N D E1 E NOTE 1 1
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dsPIC30F2010 APPENDIX A: Revision F
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dsPIC30F2010 INDEX Numerics 10-bit
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dsPIC30F2010 Instruction Addressing
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dsPIC30F2010 TimerQ (QEI Module) Ex
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dsPIC30F2010 THE MICROCHIP WEB SITE
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dsPIC30F2010 PRODUCT IDENTIFICATION
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dsPIC30F2010 Data Sheet - Microchip

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