STM32W108C8

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<strong>STM32W108C8</strong> 10.3.13 Timer x capture/compare 3 register (TIMx_CCR3) . . . . . . . . . . . . . . . 156 10.3.14 Timer x capture/compare 4 register (TIMx_CCR4) . . . . . . . . . . . . . . . 156 10.3.15 Timer 1 option register (TIM1_OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 10.3.16 Timer 2 option register (TIM2_OR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 157 10.3.17 Timer x interrupt configuration register (INT_TIMxCFG) . . . . . . . . . . . 158 10.3.18 Timer x interrupt flag register (INT_TIMxFLAG) . . . . . . . . . . . . . . . . . 158 10.3.19 Timer x missed interrupt register (INT_TIMxMISS) . . . . . . . . . . . . . . . 159 11 Analog-to-digital converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 11.1 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 11.1.1 Setup and configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 11.1.2 GPIO usage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 11.1.3 Voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 161 11.1.4 Offset/gain correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 11.1.5 DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 11.1.6 ADC configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163 Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163 Input range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .164 Sample time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .164 11.1.7 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165 11.1.8 Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166 11.2 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167 11.3 Analog-to-digital converter (ADC) registers . . . . . . . . . . . . . . . . . . . . . . 168 11.3.1 ADC configuration register (ADC_CFG) . . . . . . . . . . . . . . . . . . . . . . . 168 11.3.2 ADC offset register (ADC_OFFSET) . . . . . . . . . . . . . . . . . . . . . . . . . . 169 11.3.3 ADC gain register (ADC_GAIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169 11.3.4 ADC DMA configuration register (ADC_DMACFG) . . . . . . . . . . . . . . . 170 11.3.5 ADC DMA status register (ADC_DMASTAT) . . . . . . . . . . . . . . . . . . . . 170 11.3.6 ADC DMA begin address register (ADC_DMABEG) . . . . . . . . . . . . . . 171 11.3.7 ADC DMA buffer size register (ADC_DMASIZE) . . . . . . . . . . . . . . . . . 171 11.3.8 ADC DMA current address register (ADC_DMACUR) . . . . . . . . . . . . . 171 11.3.9 ADC DMA count register (ADC_DMACNT) . . . . . . . . . . . . . . . . . . . . . 172 11.3.10 ADC interrupt flag register (INT_ADCFLAG) . . . . . . . . . . . . . . . . . . . . 173 11.3.11 ADC interrupt configuration register (INT_ADCCFG) . . . . . . . . . . . . . 173 12 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174 12.1 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 174 7/215 Doc ID 018587 Rev 2
<strong>STM32W108C8</strong> 12.1.1 Non-maskable interrupt (NMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176 12.1.2 Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177 12.2 Event manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177 12.3 Nested vectored interrupt controller (NVIC) interrupts . . . . . . . . . . . . . . 181 12.3.1 Top-level set interrupts configuration register (INT_CFGSET) . . . . . . 181 12.3.2 Top-level clear interrupts configuration register (INT_CFGCLR) . . . . . 182 12.3.3 Top-level set interrupts pending register (INT_PENDSET) . . . . . . . . . 183 12.3.4 Top-level clear interrupts pending register (INT_PENDCLR) . . . . . . . . 184 12.3.5 Top-level active interrupts register (INT_ACTIVE) . . . . . . . . . . . . . . . . 185 12.3.6 Top-level missed interrupts register (INT_MISS) . . . . . . . . . . . . . . . . . 186 12.3.7 Auxiliary fault status register (SCS_AFSR) . . . . . . . . . . . . . . . . . . . . . 187 13 Debug support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188 13.1 STM32W108 JTAG TAP connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189 14 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 14.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 14.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 14.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 14.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 14.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 14.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190 14.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191 14.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192 14.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192 14.3.2 Operating conditions at power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192 Power-on resets (POR HV and POR LV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .192 NRST pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .193 14.3.3 Absolute maximum ratings (electrical sensitivity) . . . . . . . . . . . . . . . . 193 Electrostatic discharge (ESD). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .193 Static latch-up. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .194 14.4 ADC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194 14.5 Clock frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199 14.5.1 High frequency internal clock characteristics . . . . . . . . . . . . . . . . . . . . 199 14.5.2 High frequency external clock characteristics . . . . . . . . . . . . . . . . . . . 199 14.5.3 Low frequency internal clock characteristics . . . . . . . . . . . . . . . . . . . . 199 14.5.4 Low frequency external clock characteristics . . . . . . . . . . . . . . . . . . . . 200 Doc ID 018587 Rev 2 8/215
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Page 3 and 4: STM32W108C8 Software reset . . . .
Page 5 and 6: STM32W108C8 9 Serial interfaces . .
Page 7: STM32W108C8 10.1.4 Capture/compare
Page 11 and 12: STM32W108C8 Description 1 Descripti
Page 13 and 14: STM32W108C8 Description 1.2 Overvie
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Page 17 and 18: STM32W108C8 Pinout and pin descript
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STM32W108C8 Serial interfaces 9 Ser
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STM32W108C8 Serial interfaces Table
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STM32W108C8 Serial interfaces 9.4.3
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STM32W108C8 Serial interfaces 9.13
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STM32W108C8 Serial interfaces Bit 2
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STM32W108C8 Interrupts 12 Interrupt
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STM32W108C8 Interrupts Table 122. N
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STM32W108C8 Interrupts Figure 50. P
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STM32W108C8 Interrupts Table 123. N
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STM32W108C8 Debug support 13 Debug
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STM32W108C8 Package characteristics
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STM32W108C8 Revision history 17 Rev
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STM32W108C8 Index of registers TIMx
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STM32W108C8

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