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STM32W108C8

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<strong>STM32W108C8</strong><br />

General-purpose input/outputs<br />

8.5.11 GPIO interrupt flag register (INT_GPIOFLAG)<br />

Table 36.<br />

Address offset: 0xA814<br />

Reset value: 0x0000 0000<br />

GPIO interrupt flag register (INT_GPIOFLAG)<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />

Reserved<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

Reserved<br />

INT_IR<br />

QDFLA<br />

G<br />

INT_IR<br />

QCFLA<br />

G<br />

INT_IR<br />

QBFLA<br />

G<br />

INT_IR<br />

QAFLA<br />

G<br />

rw rw rw rw<br />

Bit 3 INT_IRQDFLAG: IRQD interrupt pending.<br />

Bit 2 INT_IRQCFLAG: IRQC interrupt pending.<br />

Bit 1 INT_IRQBFLAG: IRQB interrupt pending.<br />

Bit 0 INT_IRQAFLAG: IRQA interrupt pending.<br />

8.5.12 GPIO debug configuration register (GPIO_DBGCFG)<br />

Table 37.<br />

Address offset: 0xBC00<br />

Reset value: 0x0000 0010<br />

GPIO debug configuration register (GPIO_DBGCFG)<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />

Reserved<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

Reserved<br />

GPIO_<br />

DEBUG<br />

DIS<br />

GPIO<br />

_EXT<br />

REGE<br />

N<br />

Re-served<br />

rw<br />

rw<br />

Bit 5 GPIO_DEBUGDIS: Disable debug interface override of normal GPIO configuration.<br />

0: Permit debug interface to be active.<br />

1: Disable debug interface (if it is not already active).<br />

Bit 4 GPIO_EXTREGEN: : Disable REG_EN override of PA7's normal GPIO configuration.<br />

0: Enable override.<br />

1: Disable override.<br />

Bit 3 Reserved: this bit can change during normal operation. When writing to GPIO_DBGCFG, the<br />

value of this bit must be preserved.<br />

Doc ID 018587 Rev 2 70/215

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