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General-purpose input/outputs<br />
<strong>STM32W108C8</strong><br />
Bits [4:0] SEL_GPIO: Pin assigned to IRQx.<br />
0x00: PA0. 0x0D: PB5.<br />
0x01: PA1. 0x0E: PB6.<br />
0x02: PA2. 0x0F: PB7.<br />
0x03: PA3. 0x10: PC0.<br />
0x04: PA4. 0x11: PC1.<br />
0x05: PA5. 0x12: PC2.<br />
0x06: PA6. 0x13: PC3.<br />
0x07: PA7. 0x14: PC4.<br />
0x08: PB0. 0x15: PC5.<br />
0x09: PB1. 0x16: PC6.<br />
0x0A: PB2.<br />
0x17: PC7.<br />
0x0B: PB3.<br />
0x18 - 0x1F: Reserved.<br />
0x0C: PB4.<br />
8.5.10 GPIO interrupt x configuration register (GPIO_INTCFGx)<br />
Table 35.<br />
Address offset: 0xA860 (GPIO_INTCFGA), 0xA864 (GPIO_INTCFGB),<br />
0xA868 (GPIO_INTCFGC) and 0xA86C (GPIO_INTCFGD)<br />
Reset value: 0x0000 0000<br />
GPIO interrupt x configuration register (GPIO_INTCFGx)<br />
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />
Reserved<br />
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />
Reserved<br />
GPIO_I<br />
NTFILT<br />
rw<br />
GPIO_INTMOD<br />
rw<br />
Reserved<br />
Bit [8] GPIO_INTFILT: Set this bit to enable digital filtering on IRQx.<br />
Bits [7:5] GPIO_INTMOD: IRQx triggering mode.<br />
0x0: Disabled.0x4: Active high level triggered.<br />
0x1: Rising edge triggered.0x5: Active low level triggered.<br />
0x2: Falling edge triggered.0x6, 0x7: Reserved.<br />
0x3: Rising and falling edge triggered.<br />
69/215 Doc ID 018587 Rev 2
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