STM32W108C8

STM32W108C8
System modules
Bits [15:0] SLEEPTMR_CMPBH_FIELD:
Sleep timer compare B high value [31:16].
Sleep timer compare value, writing updates COMP_B_H (directly) and COMP_B_L (from
hold register).
Can only be changed when the ENABLE bit (bit 11 of SLEEP_CONFIG register) is set to ‘0’.
If changed when the ENABLE bit is set to ‘1’, a spurious interrupt may be generated.
Therefore it is recommended to disable interrupts before changing this register.
Table 16.
Sleep timer compare B low register (SLEEPTMR_CMPBL)
Address: 0x4000 6024
Reset value: 0x0000 FFFF
Sleep timer compare B low register (SLEEPTMR_CMPBL)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SLEEPTMR_CMPBL
rw
Bits [15:0] SLEEPTMR_CMPBL_FIELD:
Sleep timer compare B low value [15:0].
Writing to this register puts value in hold register until a write to the SLEEPTMR_CMPBH
register.
Can only be changed when the ENABLE bit (bit 11 of SLEEP_CONFIG register) is set to ‘0’.
If changed when the ENABLE bit is set to ‘1’, a spurious interrupt may be generated.
Therefore it is recommended to disable interrupts before changing this register.
Sleep timer interrupt source register (INT_SLEEPTMRFLAG)
Address: 0x4000 A014
Reset value: 0x0000 0000
Table 17. Sleep timer interrupt source register (INT_SLEEPTMRFLAG)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
INT_
SLEEP
TMR
CMPB
INT_
SLEEP
TMR
CMPA
INT_
SLEEP
TMR
WRAP
r rw rw rw
Doc ID 018587 Rev 2 46/215