STM32W108C8

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System modules STM32W108C8 Bit 4 SW_RST: When set to ‘1’, the reset is due to a software reset. Bit 3 W_DOG: When set to ‘1’, the reset is due to watchdog expiration. Bit 2 RSTB_PIN: When set to ‘1’, the reset is due to an external reset pin signal. Bit 1 POWER_LV: When set to ‘1’, the reset is due to the application of a Core power supply (or previously failed). Bit 0 POWER_HV: Always set to ‘1’, Normal power applied 6.3 Clocks The STM32W108C8 integrates four oscillators: ● High frequency RC oscillator ● 24 MHz crystal oscillator ● 10 kHz RC oscillator ● 32.768 kHz crystal oscillator 37/215 Doc ID 018587 Rev 2
STM32W108C8 System modules Figure 5 shows a block diagram of the clocks in the STM32W108C8. This simplified view shows all the clock sources and the general areas of the chip to which they are routed. Figure 5. Clocks block diagram OSC24M_CTRL[0] 12MHz RC Failover monitor (selects RC when XTAL fails ) 24MHz XTAL oscillator OSC24M_CTRL[1] OSCHF OSC 24M SCLK /2 PCLK ADC SigmaDelta Produces 6MHz or 1MHz 10kHz RC OSCRC /N (nominal 10) CLK1K ADC_CFG[2] CPU_CLKSEL[0] 32kHz XTAL oscillator OSC32K FLITF bus Flash 32kHz digital in SLEEPTMR _CLKEN[0] bus FCLK CPU bus RAM CTRL bus RAM Watchdog counter SysTick counter Sleep Timer counter /(2^N) ST _CSR[2] SLEEPTMR _CFG[7:4] SLEEPTMR _CFG[0] MAC Timer counter TIMx counter TIMx_SMCR[2:0] TIMxCLK digital in SCx RATEGEN SCxSCLK digital i /o TIMx_OR[1:0] DEBUG_EMCR[24] AND /2 TRACECLK digital out 6.3.1 High-frequency internal RC oscillator (OSCHF) The high-frequency RC oscillator (OSCHF) is used as the default system clock source when power is applied to the core domain. The nominal frequency coming out of reset is 12 MHz. Most peripherals, excluding the radio peripheral, are fully functional using the OSCHF clock source. Application software must be aware that peripherals are clocked at different speeds depending on whether OSCHF or OSC24M is being used. Since the frequency step of OSCHF is 0.5 MHz and the high-frequency crystal oscillator is used for calibration, the Doc ID 018587 Rev 2 38/215
Page 1 and 2: STM32W108C8 High-performance, IEEE
Page 3 and 4: STM32W108C8 Software reset . . . .
Page 5 and 6: STM32W108C8 9 Serial interfaces . .
Page 7 and 8: STM32W108C8 10.1.4 Capture/compare
Page 9 and 10: STM32W108C8 12.1.1 Non-maskable int
Page 11 and 12: STM32W108C8 Description 1 Descripti
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Page 15 and 16: STM32W108C8 Documentation conventio
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Page 31 and 32: STM32W108C8 Radio frequency module
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Page 45 and 46: STM32W108C8 System modules Table 11
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STM32W108C8 Serial interfaces offse
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STM32W108C8 Serial interfaces 9.8.2
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STM32W108C8 Serial interfaces 9.11.
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STM32W108C8 Serial interfaces 9.13
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STM32W108C8 Serial interfaces Bit 2
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STM32W108C8 Serial interfaces Bits
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STM32W108C8 General-purpose timers
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STM32W108C8 Analog-to-digital conve
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STM32W108C8 Interrupts 12 Interrupt
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STM32W108C8 Interrupts Table 122. N
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STM32W108C8 Interrupts Figure 50. P
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STM32W108C8 Interrupts Table 123. N
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STM32W108C8 Interrupts 12.3.2 Top-l
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STM32W108C8 Debug support 13 Debug
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STM32W108C8 Electrical characterist
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STM32W108C8 Package characteristics
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STM32W108C8 Revision history 17 Rev
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STM32W108C8 Index of registers TIMx
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STM32W108C8

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