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STM32W108C8

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<strong>STM32W108C8</strong><br />

Electrical characteristics<br />

Table 142.<br />

ADC module key parameters for input buffer disabled<br />

and 6 MHz sampling (1) (continued)<br />

Parameter<br />

Performance<br />

SDFR (dB)<br />

Single-Ended<br />

Differential<br />

60<br />

60<br />

68<br />

69<br />

75<br />

77<br />

75<br />

80<br />

75<br />

80<br />

75<br />

80<br />

75<br />

80<br />

75<br />

80<br />

THD (dB)<br />

Single-Ended<br />

Differential<br />

-45<br />

-45<br />

-54<br />

-54<br />

-63<br />

-63<br />

-68<br />

-71<br />

-70<br />

-76<br />

-70<br />

-77<br />

-70<br />

-78<br />

-70<br />

-78<br />

ENOB (from SNR)<br />

Single-Ended<br />

Differential<br />

5.6<br />

5.6<br />

7.1<br />

7.1<br />

8.6<br />

8.6<br />

10.0<br />

10.1<br />

11.4<br />

11.5<br />

12.1<br />

12.5<br />

12.4<br />

12.9<br />

12.5<br />

13.0<br />

ENOB (from SINAD)<br />

Single-Ended<br />

Differential<br />

5.5<br />

5.6<br />

7.0<br />

7.1<br />

8.5<br />

8.6<br />

9.9<br />

10.1<br />

11.0<br />

11.4<br />

11.4<br />

12.4<br />

11.5<br />

12.8<br />

11.5<br />

13.0<br />

Equivalent ADC Bits<br />

5<br />

[15:11]<br />

6<br />

[15:10]<br />

7<br />

[15:9]<br />

8<br />

[15:8]<br />

9<br />

[15:7]<br />

10<br />

[15:6]<br />

11<br />

[15:5]<br />

12<br />

[15:4]<br />

1. INL and DNL are referenced to a LSB of the Equivalent ADC Bits shown in the last row of Table 142.<br />

ENOB (effective number of bits) can be calculated from either SNR (signal to non-harmonic noise ratio) or<br />

SINAD (signal-to-noise and distortion ratio).<br />

Doc ID 018587 Rev 2 196/215

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