Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
<strong>STM32W108C8</strong><br />
Debug support<br />
13 Debug support<br />
The <strong>STM32W108C8</strong> includes a standard Serial Wire and JTAG (SWJ) Interface. The SWJ is<br />
the primary debug and programming interface of the <strong>STM32W108C8</strong>. The SWJ gives debug<br />
tools access to the internal buses of the <strong>STM32W108C8</strong>, and allows for non-intrusive<br />
memory and register access as well as CPU halt-step style debugging. Therefore, any<br />
design implementing the <strong>STM32W108C8</strong> should make the SWJ signals readily available.<br />
Serial Wire is an ARM® standard, bi-directional, two-wire protocol designed to replace<br />
JTAG, and provides all the normal JTAG debug and test functionality. JTAG is a standard<br />
five-wire protocol providing debug and test functionality. In addition, the two Serial Wire<br />
signals (SWDIO and SWCLK) are overlaid on two of the JTAG signals (JTMS and JTCK).<br />
This keeps the design compact and allows debug tools to switch between Serial Wire and<br />
JTAG as needed, without changing pin connections.<br />
While Serial Wire and JTAG offer the same debug and test functionality, ST recommends<br />
Serial Wire. Serial Wire uses only two pins instead of five, and offers a simple<br />
communication protocol, high performance data rates, low power, built-in error detection,<br />
and protection from glitches.<br />
The ARM® CoreSight Debug Access Port (DAP) comprises the Serial Wire and JTAG<br />
Interface (SWJ).The DAP includes two primary components: a debug port (the SWJ-DP)<br />
and an access port (the AHB-AP). The SWJ-DP provides external debug access, while the<br />
AHB-AP provides internal bus access. An external debug tool connected to the<br />
<strong>STM32W108C8</strong>'s debug pins communicates with the SWJ-DP. The SWJ-DP then<br />
communicates with the AHB-AP. Finally, the AHB-AP communicates on the internal bus.<br />
Figure 51.<br />
SWJ block diagram<br />
SWJ-DAP<br />
SWJ-DP<br />
SW<br />
pins<br />
SWJ-DP<br />
interface<br />
Control and<br />
select<br />
JTAG<br />
AP interface<br />
AHB-AP AHB<br />
interface<br />
Serial Wire and JTAG share five pins:<br />
●<br />
●<br />
●<br />
●<br />
JRST<br />
JTDO<br />
JTDI<br />
SWDIO/JTMS<br />
● SWCLK/JTCK<br />
Since these pins can be repurposed, refer to Section 3: Pinout and pin description on<br />
page 15 and Section 8: General-purpose input/outputs on page 55 for complete pin<br />
descriptions and configurations.<br />
Doc ID 018587 Rev 2 188/215
Change language