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STM32W108C8

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Interrupts<br />

<strong>STM32W108C8</strong><br />

12.3.7 Auxiliary fault status register (SCS_AFSR)<br />

Address: 0xE000ED3C<br />

Reset value: 0x0000 0000<br />

Table 130. Auxiliary fault status register (SCS_AFSR)<br />

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />

Reserved<br />

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />

Reserved<br />

WRON<br />

GSIZE<br />

PROT<br />

ECTE<br />

D<br />

RESE<br />

RVED<br />

MISSE<br />

D<br />

rw rw rw rw<br />

Bit 3<br />

Bit 2<br />

Bit 1<br />

Bit 0<br />

WRONGSIZE<br />

A bus fault resulted from an 8-bit or 16-bit read or write of an APB peripheral register. This<br />

fault can also result from an unaligned 32-bit access.<br />

PROTECTED<br />

A bus fault resulted from a user mode (unprivileged) write to a system APB or AHB peripheral<br />

or protected RAM.<br />

RESERVED<br />

A bus fault resulted from a read or write to an address within an APB peripheral's 4-Kbyte<br />

block range, but above the last physical register in that block. Can also result from a read or<br />

write to an address above the top of RAM or flash.<br />

MISSED<br />

A bus fault occurred when a bit was already set in this register.<br />

187/215 Doc ID 018587 Rev 2

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