STM32W108C8

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General-purpose timers <strong>STM32W108C8</strong> Bits [14:12] TIM_OC4M: Output Compare 4 Mode. (Applies only if TIM_CC4S = 0 Define the behavior of the output reference signal OC4REF from which OC4 derives. OC4REF is active high whereas OC4’s active level depends on the TIM_CC4P bit. 000: Frozen - The comparison between the output compare register TIMx_CCR4 and the counter TIMx_CNT has no effect on the outputs. 001: Set OC4REF to active on match. The OC4REF signal is forced high when the counter TIMx_CNT matches the capture/compare register 4 (TIMx_CCR4) 010: Set OC4REF to inactive on match. OC4REF signal is forced low when the counter TIMx_CNT matches the capture/compare register 4 (TIMx_CCR4). 011: Toggle - OC4REF toggles when TIMx_CNT = TIMx_CCR4. 100: Force OC4REF inactive. 101: Force OC4REF active. 110: PWM mode 1 - In up-counting, OC4REF is active as long as TIMx_CNT < TIMx_CCR4, otherwise OC4REF is inactive. In down-counting, OC4REF is inactive if TIMx_CNT > TIMx_CCR4, otherwise OC4REF is active. 111: PWM mode 2 - In up-counting, OC4REF is inactive if TIMx_CNT < TIMx_CCR4, otherwise OC4REF is active. In down-counting, OC4REF is active if TIMx_CNT > TIMx_CCR4, otherwise it is inactive. Note: In PWM mode 1 or 2, the OC4REF level changes only when the result of the comparison changes or when the output compare mode switches from “frozen” mode to “PWM” mode. Bit 11 TIM_OC4BE: Output Compare 4 Buffer Enable. (Applies only if TIM_CC4S = 0 0: Buffer register for TIMx_CCR4 is disabled. TIMx_CCR4 can be written at anytime, the new value is used by the shadow register immediately. 1: Buffer register for TIMx_CCR4 is enabled. Read/write operations access the buffer register. TIMx_CCR4 buffer value is loaded in the shadow register at each update event. Note: The PWM mode can be used without enabling the buffer register only in one pulse mode (TIM_OPM bit set in the TIMx_CR2 register), otherwise the behavior is undefined. Bit 10 TIM_OC4FE: Output Compare 4 Fast Enable. (Applies only if TIM_CC4S = 0) This bit speeds the effect of an event on the trigger in input on the OC4 output. 0: OC4 behaves normally depending on the counter and TIM_CCR4 values even when the trigger is ON. The minimum delay to activate OC4 when an edge occurs on the trigger input is 5 clock cycles. 1: An active edge on the trigger input acts like a compare match on the OC4 output. OC4 is set to the compare level independently from the result of the comparison. Delay to sample the trigger input and to activate OC4 output is reduced to 3 clock cycles. TIM_OC4FE acts only if the channel is configured in PWM 1 or PWM 2 mode. 151/215 Doc ID 018587 Rev 2
<strong>STM32W108C8</strong> General-purpose timers Bits [15:12] TIM_IC4F: Input Capture 1 Filter. (Applies only if TIM_CC4S > 0) This defines the frequency used to sample the TI4 input, f Sampling , and the length of the digital filter applied to TI4. The digital filter requires N consecutive samples in the same state before being output. 0000: f Sampling = PCLK, no filtering. 1000: f Sampling = PCLK/8, N=6. 0001: f Sampling = PCLK, N=2. 1001: f Sampling = PCLK/8, N=8. 0010: f Sampling = PCLK, N=4. 1010: f Sampling = PCLK/16, N=5. 0011: f Sampling = PCLK, N=8. 1011: f Sampling = PCLK/16, N=6. 0100: f Sampling = PCLK/2, N=6. 1100: f Sampling = PCLK/16, N=8. 0101: f Sampling = PCLK/2, N=8. 1101: f Sampling = PCLK/32, N=5. 0110: f Sampling = PCLK/4, N=6. 1110: f Sampling = PCLK/32, N=6. 0111: f Sampling = PCLK/4, N=8. 1111: f Sampling = PCLK/32, N=8. Note: PCLK is 12 MHz when using the 24 MHz crystal oscillator, and 6 MHz using the 12 MHz RC oscillator. Bits [11:10] TIM_IC4PSC: Input Capture 1 Prescaler. (Applies only if TIM_CC4S > 0) 00: No prescaling, capture each time an edge is detected on the capture input. 01: Capture once every 2 events. 10: Capture once every 4 events. 11: Capture once every 6 events. Bits [9:8] TIM_CC4S: Capture / Compare 1 Selection This configures the channel as an output or an input. If an input, it selects the input source. 00: Channel is an output. 01: Channel is an input and is mapped to TI4. 10: Channel is an input and is mapped to TI3. 11: Channel is an input and is mapped to TRGI. This mode requires an internal trigger input selected by the TIM_TS bit in the TIMx_SMCR register. Note: TIM_CC2S may be written only when the channel is off (TIM_CC2E = 0 in the TIMx_CCER register). Bits [6:4] TIM_OC3M: Output Compare 1 Mode. (Applies only if TIM_CC3S = 0) See TIM_OC4M description above. Bit 3 TIM_OC3BE: Output Compare 3 Buffer Enable. (Applies only if TIM_CC3S = 0) See TIM_OC4BE description above. Bit 2 TIM_OC3FE: Output Compare 3 Fast Enable. (Applies only if TIM_CC3S = 0) See TIM_OC4FE description above. Bits [7:4] TIM_IC3F: Input Capture 1 Filter. (Applies only if TIM_CC3S > 0) See TIM_IC4F description above. Bits [3:2] TIM_IC3PSC: Input Capture 1 Prescaler. (Applies only if TIM_CC3S > 0) See TIM_IC4PSC description above. Doc ID 018587 Rev 2 152/215
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STM32W108C8 High-performance, IEEE
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STM32W108C8 Software reset . . . .
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STM32W108C8 9 Serial interfaces . .
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STM32W108C8 10.1.4 Capture/compare
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STM32W108C8 12.1.1 Non-maskable int
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STM32W108C8 Description 1 Descripti
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STM32W108C8 Description 1.2 Overvie
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STM32W108C8 Documentation conventio
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STM32W108C8 Pinout and pin descript
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STM32W108C8 Embedded memory 4 Embed
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STM32W108C8 Radio frequency module
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STM32W108C8 System modules 6 System
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STM32W108C8 System modules 6.2 Rese
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STM32W108C8 System modules ● PRES
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STM32W108C8 System modules Figure 5
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STM32W108C8 System modules In addit
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STM32W108C8 System modules 6.4.3 Ev
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STM32W108C8 System modules Table 11
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STM32W108C8 System modules Bits [15
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STM32W108C8 System modules Bit 1 SL
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STM32W108C8 System modules debugger
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STM32W108C8 Integrated voltage regu
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STM32W108C8 General-purpose input/o
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STM32W108C8 Serial interfaces 9 Ser
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STM32W108C8 Serial interfaces Table
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STM32W108C8 Serial interfaces 9.4.3
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STM32W108C8 Serial interfaces A UAR
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STM32W108C8 Serial interfaces 9.11.
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STM32W108C8 Serial interfaces 9.12.
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STM32W108C8 Electrical characterist
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STM32W108C8 Package characteristics
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STM32W108C8 Revision history 17 Rev
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STM32W108C8 Index of registers TIMx
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STM32W108C8

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