STM32W108C8

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General-purpose timers <strong>STM32W108C8</strong> Figure 22. Counter timing diagram, update event with TIM_ARBE = 1 (counter underflow) Figure 23. Counter timing diagram, update event with TIM_ARBE = 1 (counter overflow) 117/215 Doc ID 018587 Rev 2
<strong>STM32W108C8</strong> General-purpose timers 10.1.3 Clock selection The counter clock can be provided by the following clock sources: ● ● ● ● Internal clock (PCLK) External clock mode 1: external input pin (TIy) External clock mode 2: external trigger input (ETR) Internal trigger input (ITR0): using the other timer as prescaler. Refer to the Using one timer as prescaler for the other timer for more details. Internal clock source (CK_INT) The internal clock is selected when the slave mode controller is disabled (TIM_SMS = 000 in the TIMx_SMCR register). In this mode, the TIM_CEN, TIM_DIR (in the TIMx_CR1 register), and TIM_UG bits (in the TIMx_EGR register) are actual control bits and can be changed only by software, except for TIM_UG, which remains cleared automatically. As soon as the TIM_CEN bit is written to 1, the prescaler is clocked by the internal clock CK_INT. Figure 24 shows the behavior of the control circuit and the up-counter in normal mode, without prescaling. Figure 24. Control circuit in Normal mode, internal clock divided by 1 External clock source mode 1 This mode is selected when TIM_SMS = 111 in the TIMx_SMCR register. The counter can count at each rising or falling edge on a selected input. Doc ID 018587 Rev 2 118/215
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STM32W108C8 High-performance, IEEE
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STM32W108C8 Software reset . . . .
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STM32W108C8 9 Serial interfaces . .
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STM32W108C8 10.1.4 Capture/compare
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STM32W108C8 12.1.1 Non-maskable int
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STM32W108C8 Description 1 Descripti
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STM32W108C8 Description 1.2 Overvie
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STM32W108C8 Documentation conventio
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STM32W108C8 Pinout and pin descript
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STM32W108C8 Embedded memory 4 Embed
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STM32W108C8 Embedded memory 6. Seri
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STM32W108C8 Radio frequency module
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STM32W108C8 System modules 6 System
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STM32W108C8 System modules 6.2 Rese
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STM32W108C8 System modules ● PRES
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STM32W108C8 System modules Figure 5
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STM32W108C8 System modules In addit
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STM32W108C8 System modules 6.4.3 Ev
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STM32W108C8 System modules Table 11
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STM32W108C8 System modules Bits [15
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STM32W108C8 System modules Bit 1 SL
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STM32W108C8 System modules 6.5.2 Ba
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STM32W108C8 System modules debugger
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STM32W108C8 Integrated voltage regu
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STM32W108C8 General-purpose input/o
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STM32W108C8 Analog-to-digital conve
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STM32W108C8 Interrupts 12 Interrupt
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STM32W108C8 Interrupts Table 122. N
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STM32W108C8 Interrupts Figure 50. P
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STM32W108C8 Interrupts Table 123. N
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STM32W108C8 Interrupts 12.3.2 Top-l
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STM32W108C8 Debug support 13 Debug
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STM32W108C8 Electrical characterist
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STM32W108C8 Package characteristics
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STM32W108C8 Revision history 17 Rev
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STM32W108C8 Index of registers TIMx
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STM32W108C8

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