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<strong>STM32W108C8</strong><br />
Serial interfaces<br />
9.13.12 Receive DMA count register A (SCx_RXCNTA)<br />
Table 78.<br />
Address offset: 0xC820 (SC1_RXCNTA) and 0xC020 (SC2_RXCNTA)<br />
Reset value: 0x0000 0000<br />
Receive DMA count register A (SCx_RXCNTA)<br />
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />
Reserved<br />
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />
Reserved<br />
SC_RXCNTA<br />
rw<br />
Bits [12:0] SC_RXCNTA: The offset from the start of DMA receive buffer A at which the next byte will be<br />
written. This register is set to zero when the buffer is loaded and when the DMA is reset. If this<br />
register is written when the buffer is not loaded, the buffer is loaded.<br />
9.13.13 Receive DMA count register B (SCx_RXCNTB)<br />
Table 79.<br />
Address offset: 0xC824 (SC1_RXCNTB) and 0xC024 (SC2_RXCNTB)<br />
Reset value: 0x0000 0000<br />
Receive DMA count register B (SCx_RXCNTB)<br />
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />
Reserved<br />
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />
Reserved<br />
SC_RXCNTB<br />
rw<br />
Bits [12:0] SC_RXCNTB: The offset from the start of DMA receive buffer B at which the next byte will be<br />
written. This register is set to zero when the buffer is loaded and when the DMA is reset. If this<br />
register is written when the buffer is not loaded, the buffer is loaded.<br />
Doc ID 018587 Rev 2 106/215
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