STM32W108C8

STM32W108C8
Serial interfaces
Bits [12:0] SC_TXCNT: The offset from the start of the active DMA transmit buffer from which the next byte
will be read. This register is set to zero when the buffer is loaded and when the DMA is reset.
9.13.8 Receive DMA begin address register A (SCx_RXBEGA)
Table 74.
Address offset: 0xC800 (SC1_RXBEGA) and 0xC000 (SC2_RXBEGA)
Reset value: 0x2000 0000
Receive DMA begin address register A (SCx_RXBEGA)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
SC_RXBEGA
rw
Bits [12:0] SC_RXBEGA: DMA receive buffer A start address.
9.13.9 Receive DMA begin address register B (SCx_RXBEGB)
Table 75.
Address offset: 0xC808 (SC1_RXBEGB) and 0xC008 (SC2_RXBEGB)
Reset value: 0x2000 0000
Receive DMA begin address register B (SCx_RXBEGB)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
SC_RXBEGB
rw
Bits [12:0] SC_RXBEGB: DMA receive buffer B start address.
Doc ID 018587 Rev 2 104/215