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Serial interfaces<br />
<strong>STM32W108C8</strong><br />
9.13.5 Transmit DMA end address register A (SCx_TXENDA)<br />
Table 71.<br />
Address offset: 0xC814 (SC1_TXENDA) and 0xC014 (SC2_TXENDA)<br />
Reset value: 0x2000 0000<br />
Transmit DMA end address register A (SCx_TXENDA)<br />
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />
Reserved<br />
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />
Reserved<br />
SC_TXENDA<br />
rw<br />
Bits [12:0] SC_TXENDA: Address of the last byte that will be read from the DMA transmit buffer A.<br />
9.13.6 Transmit DMA end address register B (SCx_TXENDB)<br />
Table 72.<br />
Address offset: 0xC81C (SC1_TXENDB) and 0xC01C (SC2_TXENDB)<br />
Reset value: 0x2000 0000<br />
Transmit DMA end address register B (SCx_TXENDB)<br />
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />
Reserved<br />
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />
Reserved<br />
SC_TXENDB<br />
rw<br />
Bits [12:0] SC_TXENDB: Address of the last byte that will be read from the DMA transmit buffer B.<br />
9.13.7 Transmit DMA count register (SCx_TXCNT)<br />
Table 73.<br />
Address offset: 0xC828 (SC1_TXCNT) and 0xC028 (SC2_TXCNT)<br />
Reset value: 0x0000 0000<br />
Transmit DMA count register (SCx_TXCNT)<br />
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16<br />
Reserved<br />
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0<br />
Reserved<br />
SC_TXCNT<br />
r<br />
103/215 Doc ID 018587 Rev 2
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