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Solar Grade-Silicon, Ingot, Wafer Technology and ... - Displaybank

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<strong>Solar</strong> <strong>Grade</strong>-<strong>Silicon</strong>, <strong>Ingot</strong>, <strong>Wafer</strong> <strong>Technology</strong> <strong>and</strong> Market Trend (2008~2012)<br />

Figure 3.25. EFG Growth Equipment <strong>and</strong> Substrate Manufactured in Octagonal Pilars ..........................................<br />

Figure 3.26. Substrate Manufactured by EFG (EFG-Cell 125 x 125 mm) ...............................................................<br />

Figure 3.27. <strong>Solar</strong> Cell Efficiency Using EFG <strong>Wafer</strong> ...............................................................................................<br />

Figure 3.5.7. SR Method Process Outline .................................................................................................................<br />

Figure 3.5.8. SR Method Equipment ........................................................................................................................<br />

Figure 3.5.9. Dendritic Web Equipment ...................................................................................................................<br />

Figure 3.5.10. Ribbon <strong>Solar</strong> Cell Efficiency by <strong>Technology</strong> (Lab scale) .................................................................<br />

Figure 3.5.11. RGS Growth Equipment ....................................................................................................................<br />

Figure 3.5.11. Crystal Growth <strong>and</strong> Temperature Distribution in RGS Method ........................................................<br />

Figure 3.5.12. Crystal Structure Comparison in RGS Method upon Growth Condition ..........................................<br />

Figure 3.5.12. RGS <strong>Wafer</strong> Thickness (a) <strong>and</strong> Growth Speed (b) upon Initial Substrate Temperature ...................<br />

Figure 3.5.13. Shunting Mechanisms in RGS Method .............................................................................................<br />

Figure 3.5.14. RGS Substrate Efficiency ..................................................................................................................<br />

Figure 3.5.15. CDS <strong>Wafer</strong> Manufactured by Sharp (Substrate Size: 156 x 156 mm) ...............................................<br />

Figure 3.5.16. <strong>Silicon</strong> <strong>Wafer</strong> Manufacturing Process Using CDS ............................................................................<br />

Figure 3.5.17. <strong>Wafer</strong> Size <strong>and</strong> Production Volume Variation through CDS Method .............................................<br />

Figure 3.5.18. CDS <strong>Wafer</strong>’s Flat IPF Mapping Result .............................................................................................<br />

Figure 3.5.19. <strong>Solar</strong> Cell Efficiency Using CDS <strong>Wafer</strong> .........................................................................................<br />

Figure 3.5.20. <strong>Solar</strong> Cell Module Using CDS <strong>Wafer</strong> ................................................................................................<br />

Figure 3.5.21. SSP Process Outline ..........................................................................................................................<br />

Figure 3.5.22. <strong>Silicon</strong> ribbon of 20 cm .....................................................................................................................<br />

Figure 3.5.23. SSP Sheet Underwent Recrystalization Process ................................................................................<br />

Figure 3.5.24. SSP Sheet’s Detailed Structure a.Top b. Section c. Bottom ............................................................<br />

Figure 3.6.1. Thin Film <strong>Silicon</strong> <strong>Wafer</strong> Manufactured by DFT <strong>Technology</strong> ..............................................................<br />

Figure 3.6.2. DFT <strong>Wafer</strong>ing <strong>Technology</strong> Outline .....................................................................................................<br />

Figure 3.6.3. Cleaving Stage Process Concept .........................................................................................................<br />

SAMPLE<br />

Figure 3.6.4.Characteristics of DFT <strong>Wafer</strong> Manufactured by PolyMax <strong>and</strong> <strong>Solar</strong> Cell Manfactured by<br />

Conventional <strong>Wafer</strong> ..................................................................................................................................................<br />

Figure 3.6.5. Thin Film <strong>Wafer</strong> Manufacturing <strong>Technology</strong> Concept Using SLIM Method ......................................<br />

Figure3.6.6. <strong>Solar</strong> Cell I-V Property Using <strong>Wafer</strong> Manufactured by SLIM Method ................................................<br />

Figure 4.1.1. p-Si Manufacturing Process Used in HSC ...........................................................................................<br />

Figure4.1.2. Semiconductor <strong>and</strong> <strong>Solar</strong> Cell p-So Manufactured by HSC .................................................................<br />

Figure 4.1.3. p-Si Production Plant Currently Being Constructed in Burghausen, Germany .................................<br />

Figure4.1.4. p-Si Production Plan of Wacker Chemi ................................................................................................<br />

Figure4.1.5. Vertically Integrated <strong>Solar</strong> Cell Business Structure of REC .................................................................<br />

Figure4.1.6. Moses Lake Construction .....................................................................................................................<br />

Figure4.1.7. <strong>Silicon</strong> Production system from Raw Materials to Final Products <strong>and</strong> Business Filed of<br />

Tokuyama .................................................................................................................................................................<br />

All Contents of this report remain the property of <strong>Displaybank</strong><br />

Jan’09

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