PC Control / Profi Control 645-12M Instruction Manual pdf - Kuhnke
PC Control / Profi Control 645-12M Instruction Manual pdf - Kuhnke PC Control / Profi Control 645-12M Instruction Manual pdf - Kuhnke
Summary of commands 4.6.3. Comparison commands Command Operand (example) Byte Time [µs] Function C *) Z *) BM00.00 4 0.4 Compare 8bit address yes yes CMP 100 4 0.3 8bit 8bit constant yes yes BM00.00 6 0.6 even 8bit address (00.00+00.01) yes yes CMPD BM00.01 10 2.6 Compare odd 8bit address (00.01+00.02) yes yes AO00.00 16bit 16bit address 10000 4 0.45 16bit constant yes yes BM00.00 16 1.3 Compare 8bit address yes yes CMP= 8bit 100 16 1.1 if "=" 8bit constant yes yes BM00.00 18 1.4 even 8bit address (00.00+00.01) yes yes CMPD= BM00.01 22 3.3 Compare odd 8bit address (00.01+00.02) yes yes 16bit AO00.00 16bit address if "=" 10000 16 1.3 16bit constant yes yes BM00.00 16 1.3 Compare 8bit address yes yes CMP 8bit 100 16 1.1 if "" 8bit constant yes yes BM00.00 18 1.4 even 8bit address (00.00+00.01) yes yes Compare CMPD BM00.01 22 3.3 odd 8bit address (00.01+00.02) yes yes 16bit AO00.00 16bit address if "" 10000 16 1.3 16bit constant yes yes BM00.00 16 1.3 Compare 8bit address yes yes CMP= AO00.00 if ">" 16bit address 10000 16 1.3 or "=" 16bit constant yes yes *) Influence on (C)arry and (Z)ero bit: -- no alteration 4 - 34
4.6.4. Shift and rotation commands Command Operand (example) Byte Time [µs] PC Control 645-12M used as PLC Function LSL Accu 2 0.3 Logical shift left in accu yes yes LSLM BM00.00 10 1.1 8bit in 8bit address yes yes LSR Accu 6 0.45 Logical shift right in accu yes yes LSRM BM00.00 10 1.1 8bit in 8bit address yes yes LSLD Accu 2 0.15 in accu yes yes BM00.00 10 1.1 Logical in even 8bit address (00.00+00.01 yes yes shift left LSLDM BM00.01 14 5.4 16bit in odd 8bit address (00.01+00.02) yes yes AO00.00 in 16bit address LSRD Accu 2 0.15 in accu yes yes BM00.00 10 1.1 Logical in even 8bit address (00.00+00.01 yes yes shift right LSRDM BM00.01 14 5.4 16bit in odd 8bit address (00.01+00.02) yes yes AO00.00 in 16bit address yes yes ROL Accu 2 0.15 Roll left in accu yes yes ROLM BM00.00 10 1.1 8bit in 8bit address yes yes ROR Accu 10 0.75 Roll right in accu yes yes RORM BM00.00 8bit in 8bit address yes yes ROLD Accu 2 0.15 in accu yes yes BM00.00 10 1.1 Roll left in even 8bit address (00.00+00.01 ROLDM BM00.01 14 4.5 16bit in odd 8bit address (00.01+00.02) AO00.00 in 16bit address RORD Accu 20 2.1 in accu yes yes BM00.00 26 2.1 Roll right in even 8bit address (00.00+00.01 RORDM BM00.01 34 5.1 16bit in odd 8bit address (00.01+00.02) AO00.00 in 16bit address *) Influence on (C)arry and (Z)ero bit: -- ja ++ no alteration definied flag alteration undefined flag alteration C *) Z *) 4 - 35
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4.6.4. Shift and rotation commands<br />
Command<br />
Operand<br />
(example)<br />
Byte Time<br />
[µs]<br />
<strong>PC</strong> <strong>Control</strong> <strong>645</strong>-<strong>12M</strong> used as PLC<br />
Function<br />
LSL Accu 2 0.3 Logical<br />
shift left<br />
in accu<br />
yes yes<br />
LSLM BM00.00 10 1.1 8bit in 8bit address yes yes<br />
LSR Accu 6 0.45 Logical<br />
shift right<br />
in accu<br />
yes yes<br />
LSRM BM00.00 10 1.1 8bit in 8bit address yes yes<br />
LSLD Accu 2 0.15<br />
in accu<br />
yes yes<br />
BM00.00 10 1.1<br />
Logical<br />
in even 8bit address (00.00+00.01 yes yes<br />
shift left<br />
LSLDM BM00.01 14 5.4<br />
16bit<br />
in odd 8bit address (00.01+00.02) yes yes<br />
AO00.00<br />
in 16bit address<br />
LSRD Accu 2 0.15<br />
in accu<br />
yes yes<br />
BM00.00 10 1.1<br />
Logical<br />
in even 8bit address (00.00+00.01 yes yes<br />
shift right<br />
LSRDM BM00.01 14 5.4 16bit in odd 8bit address (00.01+00.02) yes yes<br />
AO00.00 in 16bit address yes yes<br />
ROL Accu 2 0.15 Roll left in accu<br />
yes yes<br />
ROLM BM00.00 10 1.1 8bit in 8bit address yes yes<br />
ROR Accu 10 0.75 Roll right in accu<br />
yes yes<br />
RORM BM00.00<br />
8bit<br />
in 8bit address yes yes<br />
ROLD Accu 2 0.15<br />
in accu<br />
yes yes<br />
BM00.00 10 1.1 Roll left in even 8bit address (00.00+00.01<br />
ROLDM BM00.01 14 4.5 16bit in odd 8bit address (00.01+00.02)<br />
AO00.00<br />
in 16bit address<br />
RORD Accu 20 2.1<br />
in accu<br />
yes yes<br />
BM00.00 26 2.1 Roll right in even 8bit address (00.00+00.01<br />
RORDM BM00.01 34 5.1 16bit in odd 8bit address (00.01+00.02)<br />
AO00.00<br />
in 16bit address<br />
*) Influence on (C)arry and (Z)ero bit: --<br />
ja<br />
++<br />
no alteration<br />
definied flag alteration<br />
undefined flag alteration<br />
C<br />
*)<br />
Z<br />
*)<br />
4 - 35
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