Intel PXA250 and PXA210 Applications Processors
Intel PXA250 and PXA210 Applications Processors
Intel PXA250 and PXA210 Applications Processors
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Introduction 1<br />
Table 1-1.<br />
Revision History<br />
Date Revision Description<br />
Nov 2000 0.1 Initial Release: RS-<strong>Intel</strong> ® <strong>PXA250</strong> Platform Design Guide<br />
Nov 2000 0.2 Second draft<br />
Jan 2001 0.3<br />
Corrected name of FFRTS in Table 1-4.<br />
Reorganized Table 1-4 <strong>and</strong> Table 1-5 for readability.<br />
May 2001 0.6 Added reference to <strong>PXA210</strong> <strong>and</strong> performed editorial clean-up.<br />
February 2002 1.0 Public Release<br />
This document presents design recommendations, board schematics, <strong>and</strong> debug recommendations<br />
for the <strong>Intel</strong>® <strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> applications processors. The <strong>PXA250</strong> applications processor<br />
is the 32-bit version of the device <strong>and</strong> the <strong>PXA210</strong> applications processor is the 16-bit version.<br />
This document refers to both versions as the applications processor. When differences are<br />
discussed, the specific applications processor is called by name.<br />
The guidelines presented in this document ensure maximum flexibility for board designers, while<br />
reducing the risk of board-related issues. Use the schematics in Appendix B, “Example Form<br />
Factor Reference Design Schematic Diagrams” as a reference for your own design. While the<br />
included schematics cover a specific design, the core schematics remain the same for most<br />
<strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> applications processor based platforms. Consult the debug<br />
recommendations when debugging an applications processor based system. To ensure the correct<br />
implementation of the debug port (refer to Section 9 for more information), these debug<br />
recommendations should be understood before completing board design, in addition to other debug<br />
features.<br />
Table 1-2. Related Documentation<br />
Document Title<br />
Order Number<br />
<strong>Intel</strong>® <strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> <strong>Applications</strong> <strong>Processors</strong> Developer’s Manual 278522<br />
<strong>Intel</strong>® <strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> <strong>Applications</strong> <strong>Processors</strong> Electrical, Mechanical,<br />
<strong>and</strong> Thermal Specification<br />
278524<br />
1.1 Functional Overview<br />
The <strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> applications processors are the first integrated-system-on-a-chip design<br />
based on the <strong>Intel</strong>® XScale microarchitecture. The <strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> applications<br />
processors integrate the <strong>Intel</strong>® XScale microarchitecture core with many peripherals to let you<br />
design products for the h<strong>and</strong>held market.<br />
Figure 1-1 on page 1-2 is a block diagram of the applications processor.<br />
<strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> <strong>Applications</strong> <strong>Processors</strong> Design Guide 1-1