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Intel PXA250 and PXA210 Applications Processors

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I2C<br />

7.1.2 Digital-to-Analog Converter (DAC)<br />

Figure 7-1 shows the schematic for connecting the I 2 C interface to a Linear Technology<br />

micropower DAC. The DAC output is connected to the buck converter feedback path <strong>and</strong> is<br />

controlled by the I 2 C bus interface unit. The DAC can modify the voltage of the feedback path,<br />

which effects the processor core voltage.<br />

Figure 7-1. Linear Technology DAC with I 2 C Interface<br />

DC3P3V<br />

R165 1.00M<br />

U30<br />

4<br />

VCC<br />

LTC1663<br />

SA_I2C_SDA<br />

1<br />

SDA<br />

VOUT<br />

3<br />

SA_I2C_SCL<br />

5<br />

SCL<br />

GND<br />

2<br />

LTEP<br />

LTC1663C35<br />

A8752-01<br />

The signals SA_I2C_SDA <strong>and</strong> SA_I2C_SCL correspond to the applications processor signals<br />

SDA <strong>and</strong> SCL, respectively.<br />

7.1.3 Other Uses of I 2 C<br />

Figure 7-2 shows the I 2 C signals passing through an analog switch to a compact flash socket. Since<br />

the CF socket has all of the signals to support two CF cards, <strong>and</strong> this design only uses one CF card,<br />

the signals meant for a second card are being used for alternate functions. If you decide not to use a<br />

CF card, a different application using a CF card socket could be designed to utilize the I 2 C bus<br />

interface unit. If this alternate function is used, the I 2 C bus can be enabled to the CF socket by<br />

asserting the signal SA_I2C_ENAB shown in the diagram. If the user decides to use a CF Card,<br />

negate the SA_I2C_ENAB signal so the I 2 C bus traffic does not interfere with the CF card.<br />

Note:<br />

The CF card socket is disabled if a device is inserted in the expansion bus.<br />

7-2 <strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> <strong>Applications</strong> <strong>Processors</strong> Design Guide

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