Intel PXA250 and PXA210 Applications Processors
Intel PXA250 and PXA210 Applications Processors
Intel PXA250 and PXA210 Applications Processors
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LCD Display Controller<br />
Figure 3-5. Passive Color Dual Panel Displays Typical Connection<br />
<strong>PXA250</strong> Processor<br />
L_DD0<br />
L_DD1<br />
L_DD2<br />
L_DD3<br />
L_DD4<br />
L_DD5 - Top left Blue for upper panel<br />
L_DD6 - Top left Green for upper panel<br />
L_DD7 - Top left Red for upper panel<br />
L_PCLK<br />
L_LCLK<br />
L_FCLK<br />
L_BIAS<br />
DU_0<br />
DU_1<br />
DU_2<br />
DU_3<br />
DU_4<br />
DU_5<br />
DU_6<br />
DU_7<br />
Pixel_Clock<br />
Line_Clock<br />
Frame_Clock<br />
Bias<br />
Upper Panel<br />
LCD Display<br />
L_DD8<br />
L_DD9<br />
L_DD10<br />
L_DD11<br />
L_DD12<br />
L_DD13 - Top left Blue for lower panel<br />
L_DD14 - Top left Green for lower panel<br />
L_DD15 - Top left Red for lower panel<br />
DL_0<br />
DL_1<br />
DL_2<br />
DL_3<br />
DL_4<br />
DL_5<br />
DL_6<br />
DL_7<br />
Lower Panel<br />
3.3 Active (TFT) Displays<br />
Because data is sent to the panel as raw 16-bit pixel data, active displays require16 data pins in<br />
order to transfer the pixel data from the controller. All 16 data lines are also required to drive one<br />
pixel value. The 16 bits of data describe the intensity level of the red, green <strong>and</strong> blue for each pixel.<br />
Typically, this is formatted as 5 bits for red, 6 bits for green <strong>and</strong> 5 bits for blue, but this can vary by<br />
display <strong>and</strong> is controlled by the software writing to the frame buffer. Refer to the display datasheet<br />
to ensure that the correct the <strong>PXA250</strong> applications processor LCD data lines are connected to the<br />
correct LCD panel data lines.<br />
Many active displays actually have more than 16 data lines - usually 18 (6 of each color). For these<br />
panels it is recommended that the most significant lines of the panel lines are connected to the data<br />
lines from the <strong>PXA250</strong> applications processor. This maintains the panel’s full range of colors but<br />
increases the granularity of the color spectrum with an insufficient number of data lines. All unused<br />
panel data lines can be tied either high or low. Other options include tying the LSB of red <strong>and</strong> blue<br />
to the next bit, R1 or B1.<br />
For active displays, connect the pins described in Table 3-3 between the <strong>PXA250</strong> applications<br />
processor <strong>and</strong> the LCD panel.<br />
<strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> <strong>Applications</strong> Processor Design Guide 3-5
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