Intel PXA250 and PXA210 Applications Processors
Intel PXA250 and PXA210 Applications Processors Intel PXA250 and PXA210 Applications Processors
8 INDUCTOR 1 Sheet 13 of 16 1 7 6 5 4 3 2 Copyright 2002 Intel Corporation LCD CPLD D5 U33 2 R216 DCNEG14V U40 1 {14} XCR3128XL-10VQ100C 3 100K Xilinx CPLD 2 40 {14} LCD_G4 A0 E0_CLK1 MAX633ACSA D6 1 {14} LCD_G5 A2 E2 41 CF_nCD1 {10} Adj Step-up 100 D {14} LCD_SPS A4 E4 42 nNEP_PRESENT {4,15} Sw Reg D 99 LCD_DC5V {14} LCD_CLS A5 E5 44 CF_PWR_ON {6} 1 8 ZENER_3P3V LBI COMP 98 {14} LCD_LP A7 E7 45 CF_PWR {10} DC_15V {14,15} DCNEG11P7V {14} 97 46 {14} LCD_SPL A8 E8 GPIO_11 96 47 {3} 2 7 LBO VFB {14} LCD_G0 A10 E10 {14} LCD_G1 94 A12 E12 48 nXCV_ADD_OE {6,7} 3 6 93 49 L3 GND CP {14} LCD_G2 A13 E13 92 50 {14} LCD_G3 A15_CLK3 E15 MBREQ_CF_DETECT {3,15} 4 5 LX VOUT SYSCLK {8,15} VBATT 14 {14} LCD_SPR B0 F0 52 nGFX_PRESENT {4,15} 470UH REV {4} LCD_TYPE 13 53 L_DD_0 {3} + C129 B2 F2 12 54 L_DD_1 {3} MAX633ACSA B4 F4 4.7UF 10 {14} LCD_R2 B5 F5 55 L_DD_2 9 {3} {14} LCD_R3 B7 F7 56 L_DD_3 8 {3} {14} LCD_R4 B8 F8 57 L_DD_4 {3} {14} LCD_R5 7 B10 F10 58 L_DD_5 6 {3} {14} LCD_LBR B12 F12 60 L_DD_6 5 {3} {14} LCD_PS B13 F13 61 L_DD_7 4 {3} {6} CPLD1_TDO B15_TDI F15_TCK 62 JTAG_TCK {3,6,10,11,14} 25 {6} MMC_PWR_ON C0 G0 63 L_DD_8 24 {3,4} {2,11} nMMC_DETECT C2 G2 64 L_DD_9 23 {3,4} {11} MMC_ON C4 G4 65 L_DD_10 22 {3,4} {14} SHARP_LCD_PWR_ON C5 G5 67 L_DD_11 C 21 {3,4} {14} LCD_R0 C7 G7 68 L_DD_12 {3,4} C 20 {14} LCD_R1 C8 G8 69 L_DD_13 19 {3,4} {14} LCD_B1 C10 G10 70 L_DD_14 17 {3,4} {14} LCD_B0 C12 G12 71 L_DD_15 {14} LCD_CLK 16 {3,4} C13 G13 72 L_LCLK 15 {3} {3,6,10,11,14} JTAG_TMS C15_TMS G15_TDO 73 CPLD2_TDO {3} R213 37 D0_CLK2 H0 75 L_FCLK 36 76 {3} 100K {3} nVDD_FAULT D2 H2 L_BIAS 35 {3} LCD_DC5V {15} VDD_FAULT D4 H4 77 33 U44 D5 H5 78 LCD_PWR_ON {6,14} {14} LCD_ENAB 32 D7 H7 79 SA_PWR_EN {3,12} Note: On 31 80 R214 {14} LCD_NCLK D8 H8 nRESET_OUT {3,6,11,15} 30 HBL-0204 {14} LCD_B5 D10 H10 81 FLASH_nRP {5} A1 VCC board Back 29 83 H CN2-1 {14} LCD_B2 LCD_MODE {14} A2 100K D12 H12 {3,8,10,11,12,14} VIN 28 A3 Light Inverter {14} LCD_B3 D13 H13 84 {14} LCD_B4 LCD_UBL {14} R207 ON_OFF 27 L CN2-2 D15 H15 85 {2} SA_PWM_0 A4 GND for Toshiba 0 87 DNI PIEZOELECTRIC INVERTER Display {3} L_PCLK IN0_CLK0 89 R171 IN1 88 IN2 {10} CF_nCD2 90 100K IN3 DC3P3V 3 VDD_1 VSS_1 11 B 18 26 B VDD_2 VSS_2 34 VDD_3 VSS_3 38 39 VDD_4 VSS_4 43 51 59 DNI Back Light VDD_5 VSS_5 66 74 R151 VDD_6 VSS_6 82 86 Header for VDD_7 VSS_7 {2} SA_PWM_0 91 VDD_8 VSS_8 95 4.99K Off Board Sharp Back XCR3128XL-10VQ100C Light Inverter LCD_DC5V R172 LCD_DC5V {14} VCOM U35 U34 R173 10 J11 SN74HCT04D DC5P5V {14} PVEE SN74HCT04D 10 Hex Inv 1 C109 Hex Inv R175 1 1A 14 2 VDD LCD_DC4V {14} {6} LIGHT_PWR_ON 1 1A 14 2 2 3 VDD 1Y REV R152 2 13 4 1Y REV 10K 15UF 6A 13 3 12 nREV 2A 6Y 0 5 6A AB_SW {14} {3,8,10,11,12,14} VBATT 3 + 2A 12 4 6Y 2Y 4 11 A 2Y 5A 11 10 Layout Note: A 5A 5Y 10 5 VBATT ADD WIDE 53261-0590 5Y 3A 5 6 9 ETCH 3A 3Y 4A 6 9 4Y 8 3Y 4A 8 V0 {14} 7 4Y GND 7 PXA250 Processor Reference Design GND C111 SN74HCT04PWR SN74HCT04PWR {14} DCNEG14V Size Rev 15UF B 2.07 R177 15K 2 1 R176 27.4K 4.7UF C110 1 R174 5K 3 C107 0.1UF C108 0.1UF C105 0.1UF C106 0.1UF + + R208 + 0 22UF C120 C122 0.1UF C126 C127 0.1UF R202 9.76K 1 2 C121 22UF + + C93 0.1UF C128 22UF 0.1UF 1 2 3 Pg. 13 8 7 6 5 4 3 Date: Tuesday, February 05, 2002 2
8 C C 1 7 6 5 4 3 2 Copyright 2002 Intel Corporation LCD Power 3 4 3 4 D {6,13} LCD_PWR_ON EN BYP {6,13} LCD_PWR_ON EN BYP D L_DC3P3V L_DC3P1V L_DC2P6V L_DC3P6V L_DC2P3V LEAA LE50 L_DC2P1V L_DC1P15V L_DC1P9V L_DC0P5V L_DC2P35V L_DC1P6V {13} LCD_DC4V L_DC2P0V L_DC0P9V L_DC1P75V L_DC1P45V DC5P5V MIC5207-3.3BM5 5 LCD_DC5V U38 3.3V LDO REG 1 MIC5207-4.0BM5 {3,8,10,11,12,13} VBATT 180ma 5 VIN VOUT LCD_DC3P3V 4.0V LDO REG 2 GND + 1 180ma VIN VOUT 3 EN BYP 4 2 GND LE33 {13} SHARP_LCD_PWR_ON 3 4 EN BYP LE40 J13 1 2 U41 MIC5207-BM5 ADJ LDO REG VIN 180ma VOUT GND U36 Sharp LCD Connector 5 DC5P5V U37 LCD_DC5V 1 2 MIC5207-5.0BM5 5.0V LDO REG VIN 180ma VOUT GND 5 100UF + C116 Pg. 14 LCD_DC4V {13} (50) 1 AGND (49) V9 2 V9 LCD Grey Scale (48) Touch Screen V8 3 V8 (47) V7 4 V7 Level Buffer (46) Connector V6 5 V6 (45) V5 6 U39 V5 (44) V4 7 V4 LCD_DC5V (43) V3 8 J21 V3 (42) V2 9 V2 LMC6009 1 TSPY {8} (41) V1 10 V1 9 Ch Buf Amp 2 TSMX {8} (40) V0 11 V0 {13} for TFT-LCD 3 TSMY {8} (39) VSHA 12 4 LCD_SPR {13} L_DC3P3V A1A 4 TSPX {8} (38) 13 5 42 SPR L_DC0P5V A1B A1 OUT V1 (37) 14 LCD_LBR {13} L_DC3P1V 6 LBR A2A (36) DCLK 15 LCD_CLK {13} L_DC0P9V 7 41 V2 487951-4 A2B A2 OUT (35) LP 16 LCD_LP {13} 8 LCD_PS Toshiba LCD Connector {13} L_DC2P6V A3A (34) PS 17 L_DC1P45V 9 40 A3B A3 OUT V3 (33) DGND 18 L_DC2P35V 10 A4A (32) VSHD 19 LCD_DC3P3V L_DC1P75V 11 39 V4 J14 A4B A4 OUT (31) B5 20 LCD_B5 {13} L_DC2P1V 12 A5A (30) B4 21 LCD_B4 {13} L_DC2P0V 13 36 A5B A5 OUT V5 B B (29) B3 22 LCD_B3 {13} L_DC1P9V 14 A6A 1 (28) B2 23 LCD_B2 {13} L_DC2P3V 15 35 A6B A6 OUT V6 2 {13} LCD_NCLK (27) B1 24 LCD_B1 {13} 16 L_DC1P6V A7A 3 (26) B0 25 LCD_B0 {13} 17 34 L_DC2P6V A7B A7 OUT V7 4 {13} LCD_R0 (25) G5 26 LCD_G5 {13} 18 L_DC1P15V A8A 5 LCD_R1 {13} (24) G4 27 LCD_G4 {13} 19 33 L_DC3P3V A8B A8 OUT V8 6 {13} LCD_R2 (23) G3 28 LCD_G3 {13} L_DC0P5V 20 A9A 7 LCD_R3 {13} (22) G2 29 LCD_G2 {13} L_DC3P6V 21 32 A9B A9 OUT V9 8 {13} LCD_R4 (21) G1 30 LCD_G1 9 {13} LCD_R5 {13} (20) G0 31 LCD_G0 {13} 29 {13} AB_SW A_B_SWITCH 10 (19) R5 32 LCD_R5 11 {13} LCD_G0 {13} (18) R4 33 LCD_R4 {13} 1 26 NC1 NC8 12 {13} LCD_G1 (17) R3 34 LCD_R3 {13} 2 27 NC2 NC9 13 LCD_G2 {13} (16) R2 35 LCD_R2 {13} 3 28 NC3 NC10 14 {13} LCD_G3 (15) R1 36 LCD_R1 {13} 22 45 LCD_G4 {13} (14) R0 37 LCD_R0 {13} 23 NC4 NC11 15 46 NC5 NC12 16 {13} LCD_G5 (13) 38 SPL LCD_SPL {13} 24 47 NC6 NC13 17 (12) VCOM1 39 VCOM {13} 25 48 NC7 NC14 18 {13} LCD_B0 (11) VCOM2 40 VCOM 19 {13} LCD_B1 {13} (10) VEE2 41 PVEE {13} 44 43 {13} LCD_DC4V VDD1 GND1 20 {13} LCD_B2 (9) VEE1 42 PVEE {13} 38 37 VDD2 GND2 21 LCD_B3 {13} (8) VSS1 43 DCNEG14V {13} 30 31 VDD3 GND3 {13} LCD_B4 22 (7) CLS 44 LCD_CLS 23 {13} A LCD_B5 {13} (6) SPS 45 LCD_SPS 24 {13} A {13} LCD_ENAB (5) UL 46 LCD_UBL 25 {13} (4) MOD2 47 LCD_MODE {13} 26 LCD_DC3P3V (3) MOD1 48 LCD_MODE {13} 27 LCD_DC3P3V (2) VCC1 49 DCNEG11P7V {13} (1) VDD1 50 DC_15V JAE {13,15} PXA250 Processor Reference Design C119 0.1UF R193 28.7K R194 12.4K R195 40.2K R196 22.6K R197 36.5K 2 2 C112 C117 0.1UF 4.7UF 4.7UF R188 23.7K R189 34.8K R190 18.7K R191 27.4K R192 7.32K C113 0.1UF 1 R183 30.1K R184 30.1K R185 6.19K R186 40.2K R187 13.7K R204 150K 2 R178 17.4K R179 22.6K R180 34.8K R181 9.76K R182 42.2K R199 100K C114 0.1UF 4.7UF + C115 1 + C118 1 IL-FHJ-27S-HF Molex TOP_CONN_50 Size Rev B 2.07 8 7 6 54104-5090 5 4 3 Date: Tuesday, February 05, 2002 2 Sheet 14 of 16 1
- Page 67 and 68: . I2C Figure 7-2. Using an Analog S
- Page 69 and 70: Power and Clocking 8 8.1 Operating
- Page 71 and 72: Power and Clocking Since few system
- Page 73 and 74: Power and Clocking Table 8-4. 32.76
- Page 75 and 76: Power and Clocking Table 8-6. PXA25
- Page 77 and 78: Power and Clocking Table 8-6. PXA25
- Page 79 and 80: Power and Clocking Table 8-6. PXA25
- Page 81 and 82: Power and Clocking Figure 8-2. Hard
- Page 83 and 84: Power and Clocking Table 8-10. Slee
- Page 85 and 86: Power and Clocking Table 8-14. Sync
- Page 87 and 88: Power and Clocking Table 8-16. Vari
- Page 89 and 90: Power and Clocking • Provide powe
- Page 91 and 92: Power and Clocking 8.7.4 I/O 3.3 V
- Page 93 and 94: JTAG/Debug Port 9 9.1 Description T
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- Page 105 and 106: Example Form Factor Reference Desig
- Page 107 and 108: 8 1 7 6 5 4 3 2 Copyright 2002 Inte
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- Page 117: 8 IN_PWR {10,15} D10 1 Pg. 12 7 6 5
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- Page 164: DCPXA250 Processor Card 32-bit vers
8<br />
INDUCTOR<br />
1<br />
Sheet 13 of 16<br />
1<br />
7<br />
6<br />
5<br />
4<br />
3<br />
2<br />
Copyright 2002 <strong>Intel</strong> Corporation<br />
LCD CPLD<br />
D5<br />
U33<br />
2<br />
R216<br />
DCNEG14V<br />
U40<br />
1<br />
{14}<br />
XCR3128XL-10VQ100C<br />
3<br />
100K<br />
Xilinx CPLD<br />
2<br />
40<br />
{14} LCD_G4 A0<br />
E0_CLK1<br />
MAX633ACSA<br />
D6<br />
1<br />
{14} LCD_G5 A2<br />
E2<br />
41<br />
CF_nCD1 {10}<br />
Adj Step-up<br />
100<br />
D {14} LCD_SPS A4<br />
E4<br />
42<br />
nNEP_PRESENT {4,15}<br />
Sw Reg<br />
D<br />
99<br />
LCD_DC5V<br />
{14} LCD_CLS A5<br />
E5<br />
44<br />
CF_PWR_ON {6}<br />
1<br />
8<br />
ZENER_3P3V<br />
LBI COMP<br />
98<br />
{14} LCD_LP A7<br />
E7<br />
45<br />
CF_PWR {10}<br />
DC_15V {14,15}<br />
DCNEG11P7V {14}<br />
97<br />
46<br />
{14} LCD_SPL A8<br />
E8<br />
GPIO_11<br />
96<br />
47<br />
{3}<br />
2<br />
7<br />
LBO<br />
VFB<br />
{14} LCD_G0 A10<br />
E10<br />
{14} LCD_G1<br />
94<br />
A12<br />
E12<br />
48<br />
nXCV_ADD_OE {6,7}<br />
3 6<br />
93<br />
49<br />
L3<br />
GND CP<br />
{14} LCD_G2 A13<br />
E13<br />
92<br />
50<br />
{14} LCD_G3 A15_CLK3<br />
E15<br />
MBREQ_CF_DETECT {3,15}<br />
4<br />
5<br />
LX<br />
VOUT<br />
SYSCLK {8,15} VBATT<br />
14<br />
{14} LCD_SPR B0<br />
F0<br />
52<br />
nGFX_PRESENT {4,15}<br />
470UH<br />
REV {4} LCD_TYPE<br />
13<br />
53<br />
L_DD_0 {3}<br />
+<br />
C129<br />
B2<br />
F2<br />
12<br />
54<br />
L_DD_1 {3}<br />
MAX633ACSA<br />
B4<br />
F4<br />
4.7UF<br />
10<br />
{14} LCD_R2 B5<br />
F5<br />
55<br />
L_DD_2<br />
9<br />
{3}<br />
{14} LCD_R3 B7<br />
F7<br />
56<br />
L_DD_3<br />
8<br />
{3}<br />
{14} LCD_R4 B8<br />
F8<br />
57<br />
L_DD_4 {3}<br />
{14} LCD_R5<br />
7<br />
B10<br />
F10<br />
58<br />
L_DD_5<br />
6<br />
{3}<br />
{14} LCD_LBR B12<br />
F12<br />
60<br />
L_DD_6<br />
5<br />
{3}<br />
{14} LCD_PS B13<br />
F13<br />
61<br />
L_DD_7<br />
4<br />
{3}<br />
{6} CPLD1_TDO B15_TDI<br />
F15_TCK<br />
62<br />
JTAG_TCK {3,6,10,11,14}<br />
25<br />
{6} MMC_PWR_ON<br />
C0<br />
G0<br />
63<br />
L_DD_8<br />
24<br />
{3,4}<br />
{2,11} nMMC_DETECT<br />
C2<br />
G2<br />
64<br />
L_DD_9<br />
23<br />
{3,4}<br />
{11} MMC_ON C4<br />
G4<br />
65<br />
L_DD_10<br />
22<br />
{3,4} {14} SHARP_LCD_PWR_ON<br />
C5<br />
G5<br />
67<br />
L_DD_11<br />
C 21<br />
{3,4}<br />
{14} LCD_R0 C7<br />
G7<br />
68<br />
L_DD_12 {3,4}<br />
C<br />
20<br />
{14} LCD_R1 C8<br />
G8<br />
69<br />
L_DD_13<br />
19<br />
{3,4}<br />
{14} LCD_B1 C10<br />
G10<br />
70<br />
L_DD_14<br />
17<br />
{3,4}<br />
{14} LCD_B0 C12<br />
G12<br />
71<br />
L_DD_15 {14} LCD_CLK 16<br />
{3,4}<br />
C13<br />
G13<br />
72<br />
L_LCLK<br />
15<br />
{3}<br />
{3,6,10,11,14} JTAG_TMS<br />
C15_TMS G15_TDO<br />
73<br />
CPLD2_TDO {3}<br />
R213<br />
37<br />
D0_CLK2<br />
H0<br />
75<br />
L_FCLK<br />
36<br />
76<br />
{3}<br />
100K<br />
{3} nVDD_FAULT<br />
D2<br />
H2<br />
L_BIAS<br />
35<br />
{3}<br />
LCD_DC5V<br />
{15} VDD_FAULT D4<br />
H4<br />
77<br />
33<br />
U44<br />
D5<br />
H5<br />
78<br />
LCD_PWR_ON {6,14}<br />
{14} LCD_ENAB<br />
32<br />
D7<br />
H7<br />
79<br />
SA_PWR_EN {3,12}<br />
Note: On<br />
31<br />
80<br />
R214<br />
{14} LCD_NCLK D8<br />
H8<br />
nRESET_OUT {3,6,11,15}<br />
30<br />
HBL-0204<br />
{14} LCD_B5 D10<br />
H10<br />
81<br />
FLASH_nRP {5}<br />
A1<br />
VCC<br />
board Back<br />
29<br />
83<br />
H CN2-1<br />
{14} LCD_B2<br />
LCD_MODE {14}<br />
A2<br />
100K<br />
D12<br />
H12<br />
{3,8,10,11,12,14}<br />
VIN<br />
28<br />
A3<br />
Light Inverter<br />
{14} LCD_B3 D13<br />
H13<br />
84<br />
{14} LCD_B4<br />
LCD_UBL {14}<br />
R207<br />
ON_OFF<br />
27<br />
L CN2-2<br />
D15<br />
H15<br />
85<br />
{2} SA_PWM_0<br />
A4<br />
GND<br />
for Toshiba<br />
0<br />
87<br />
DNI<br />
PIEZOELECTRIC INVERTER Display<br />
{3} L_PCLK IN0_CLK0<br />
89<br />
R171<br />
IN1<br />
88<br />
IN2<br />
{10} CF_nCD2<br />
90<br />
100K<br />
IN3<br />
DC3P3V<br />
3<br />
VDD_1<br />
VSS_1<br />
11<br />
B 18<br />
26<br />
B<br />
VDD_2<br />
VSS_2<br />
34<br />
VDD_3<br />
VSS_3<br />
38<br />
39<br />
VDD_4<br />
VSS_4<br />
43<br />
51<br />
59<br />
DNI<br />
Back Light<br />
VDD_5<br />
VSS_5<br />
66<br />
74<br />
R151<br />
VDD_6<br />
VSS_6<br />
82<br />
86<br />
Header for<br />
VDD_7<br />
VSS_7<br />
{2} SA_PWM_0<br />
91<br />
VDD_8<br />
VSS_8<br />
95<br />
4.99K<br />
Off Board<br />
Sharp Back<br />
XCR3128XL-10VQ100C<br />
Light Inverter<br />
LCD_DC5V<br />
R172<br />
LCD_DC5V<br />
{14} VCOM<br />
U35<br />
U34<br />
R173<br />
10<br />
J11<br />
SN74HCT04D<br />
DC5P5V<br />
{14} PVEE<br />
SN74HCT04D<br />
10<br />
Hex Inv<br />
1<br />
C109<br />
Hex Inv<br />
R175<br />
1<br />
1A<br />
14<br />
2<br />
VDD<br />
LCD_DC4V {14} {6} LIGHT_PWR_ON<br />
1<br />
1A<br />
14<br />
2<br />
2<br />
3<br />
VDD<br />
1Y<br />
REV<br />
R152<br />
2<br />
13<br />
4<br />
1Y<br />
REV<br />
10K<br />
15UF<br />
6A<br />
13<br />
3<br />
12<br />
nREV<br />
2A 6Y<br />
0<br />
5<br />
6A<br />
AB_SW {14}<br />
{3,8,10,11,12,14} VBATT<br />
3<br />
+<br />
2A<br />
12<br />
4<br />
6Y<br />
2Y<br />
4<br />
11<br />
A 2Y<br />
5A<br />
11<br />
10<br />
Layout Note:<br />
A<br />
5A<br />
5Y<br />
10<br />
5<br />
VBATT ADD WIDE<br />
53261-0590<br />
5Y<br />
3A<br />
5<br />
6<br />
9<br />
ETCH<br />
3A<br />
3Y 4A<br />
6<br />
9<br />
4Y<br />
8<br />
3Y 4A<br />
8<br />
V0 {14}<br />
7<br />
4Y<br />
GND<br />
7<br />
<strong>PXA250</strong> Processor Reference Design<br />
GND<br />
C111<br />
SN74HCT04PWR<br />
SN74HCT04PWR<br />
{14} DCNEG14V<br />
Size Rev<br />
15UF<br />
B<br />
2.07<br />
R177<br />
15K<br />
2<br />
1<br />
R176<br />
27.4K<br />
4.7UF<br />
C110<br />
1<br />
R174<br />
5K<br />
3<br />
C107<br />
0.1UF<br />
C108<br />
0.1UF<br />
C105<br />
0.1UF<br />
C106<br />
0.1UF<br />
+<br />
+<br />
R208<br />
+<br />
0<br />
22UF<br />
C120<br />
C122<br />
0.1UF<br />
C126<br />
C127<br />
0.1UF<br />
R202<br />
9.76K<br />
1 2<br />
C121<br />
22UF<br />
+<br />
+<br />
C93<br />
0.1UF C128<br />
22UF<br />
0.1UF<br />
1<br />
2<br />
3<br />
Pg. 13<br />
8<br />
7<br />
6<br />
5<br />
4<br />
3<br />
Date:<br />
Tuesday, February 05, 2002<br />
2
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