Intel PXA250 and PXA210 Applications Processors
Intel PXA250 and PXA210 Applications Processors
Intel PXA250 and PXA210 Applications Processors
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8<br />
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Pg. 11<br />
Sheet 11 of 16<br />
1<br />
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6<br />
5<br />
4<br />
3<br />
2<br />
Copyright 2002 <strong>Intel</strong> Corporation<br />
SD Socket<br />
DC3P3V<br />
J10<br />
R147 10K<br />
D D<br />
Bottom Mount<br />
MMC_CS0 {2} RADIO_DSR {2}<br />
DC3P3V<br />
DAT2<br />
9<br />
SA_MMCMD {2}<br />
LAYOUT NOTE: Place close to<br />
Battery Header <strong>and</strong> Codec UCB<br />
CD_DAT3<br />
1<br />
1400<br />
2<br />
CMD<br />
3<br />
Radio<br />
VSS1<br />
C132<br />
4<br />
MMC_PWR<br />
Baseb<strong>and</strong><br />
VDD<br />
{8} LINE_OUT_L<br />
5<br />
DNI IF MMC<br />
Connector<br />
SA_MMCCLK {2}<br />
0.1UF J20<br />
CLK<br />
C140<br />
VSS2<br />
6<br />
R225<br />
{8} LINE_OUT_R<br />
1<br />
2<br />
0<br />
DAT0<br />
7<br />
SA_MMDAT {2}<br />
DC3P3V<br />
0.1UF<br />
3<br />
4<br />
R226 DNI 0<br />
MMC<br />
MMC_WP {2} 19<br />
20<br />
R227 DNI 100K<br />
{9} RADIO_MICP<br />
DAT1<br />
8<br />
DC3P3V<br />
DNI<br />
5<br />
{2} RADIO_DTR<br />
{2}<br />
6<br />
SA_BT_CTS<br />
R150<br />
IF<br />
{2} SA_BT_RTS<br />
7<br />
8<br />
SD<br />
DNI<br />
SA_BT_RXD<br />
{2,15}<br />
IF<br />
{2,15} SA_BT_TXD<br />
9<br />
10<br />
RADIO_RI {2}<br />
C C<br />
SD<br />
47.5K<br />
{6} RADIO_PWR_ON<br />
11<br />
12<br />
RADIO_RXD_C {2}<br />
nMMC_DETECT {2,13}<br />
DC3P3V<br />
13<br />
{6} RADIO_WAKE<br />
14<br />
nRESET_IN {3,10,15} CARD Selection Resistors<br />
15<br />
16<br />
RADIO_SPKRN<br />
<strong>and</strong> Values<br />
DNI<br />
{2} RADIO_DCD<br />
RES SD MMC<br />
IF<br />
{8,9} 17<br />
MICGND<br />
18<br />
RADIO_SPKRP<br />
{8}<br />
R225 0 DNI<br />
21 22<br />
{3,6,13,15} nRESET_OUT<br />
R228 100K DNI<br />
DC5P5V<br />
23 24<br />
{3,8,10,12,13,14} VBATT<br />
AC97_GPIO_0 {8}<br />
DC5P5V<br />
{3,8,10,12,13,14} VBATT<br />
25 26<br />
AC97_GPIO_1 {8}<br />
U27<br />
R198<br />
27 28<br />
AC97_GPIO_2 {8}<br />
MIC5207-3.3BM5<br />
0<br />
3.3V LDO REG<br />
29 30<br />
MMC_PWR<br />
{8} AC97_GPIO_4<br />
AC97_GPIO_3 {8}<br />
1<br />
VIN 180ma VOUT<br />
5<br />
2<br />
GND<br />
+<br />
B B<br />
{13} 3 MMC_ON EN BYP<br />
4<br />
LE33<br />
R226<br />
0<br />
DC3P3V<br />
DC3P3V<br />
JTAG ICE Connector<br />
DNI<br />
R236<br />
DVAL_1<br />
{15}<br />
DREQ_1 {15}<br />
DREQ_0 {15}<br />
J19<br />
{2,10} GPIO_22<br />
R221<br />
1<br />
2<br />
{3,6,10,13} 0 R219<br />
JTAG_TMS 0<br />
{15}<br />
R233 0<br />
{3} JTAG_nTRST<br />
3<br />
4<br />
{2,10} GPIO_21<br />
{6,10} 5<br />
6<br />
CPLD1_TDI<br />
{6,10} 0 R218<br />
CPLD1_TDI DVAL_0 {15}<br />
DNI<br />
{3,6,10,13} JTAG_TMS<br />
7<br />
8<br />
{2,10} R234 0<br />
GPIO_19<br />
0<br />
R232<br />
{3,6,10,13} 9<br />
10<br />
JTAG_TCK<br />
{3,6,10,13} JTAG_TCK 11<br />
12<br />
{2,10} R235 0<br />
GPIO_20<br />
{3,10} R223<br />
SA_TDO<br />
13<br />
14<br />
{3,10} 0 R231<br />
SA_TDO<br />
0<br />
A A<br />
75 R224<br />
{3,10,15} nRESET_IN<br />
15<br />
16<br />
0<br />
17<br />
18<br />
R222<br />
100K<br />
R270<br />
10K<br />
2<br />
4.7UF<br />
C92<br />
1<br />
R229<br />
100K<br />
R228<br />
100K<br />
10<br />
11<br />
12<br />
R227<br />
100K<br />
WP<br />
COMM<br />
CD<br />
CHECK !!<br />
C91<br />
0.1UF<br />
19<br />
20<br />
<strong>PXA250</strong> Processor Reference Design<br />
Size Rev<br />
B<br />
2.07<br />
8<br />
7<br />
6<br />
5<br />
4<br />
3<br />
Date:<br />
Tuesday, February 05, 2002<br />
2
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