Intel PXA250 and PXA210 Applications Processors
Intel PXA250 and PXA210 Applications Processors
Intel PXA250 and PXA210 Applications Processors
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
Introduction<br />
• System memory interface<br />
—100MHz SDRAM<br />
— 4 MB to 256 MB of SDRAM memory<br />
— Support for 16, 64, 128, or 256 Mbit DRAM technologies<br />
— 4 Banks of SDRAM, each supporting 64 MB of memory<br />
— Clock enable (1 CKE pin is provided to put the entire SDRAM interface into self refresh)<br />
— Supports as many as 6 static memory devices (SRAM, Flash, or VLIO)<br />
• PCMCIA/Compact Flash card control pins<br />
• LCD Controller pins<br />
• Full Function UART<br />
• Bluetooth UART<br />
• MMC Controller pins<br />
• SSP Pins<br />
• USB Client Pins<br />
• AC’97 Controller Pins<br />
• St<strong>and</strong>ard UART Pins<br />
• I 2 C Controller pins<br />
• PWM pins<br />
• 15 dedicated GPIOs pins<br />
• Integrated JTAG support<br />
Package features of the <strong>PXA210</strong> applications processor are:<br />
• Core frequencies supported – 100 MHz, 133 MHz, 200 MHzSystem memory interface<br />
— 100 MHz SDRAM, 16-bit only<br />
— 2 MB to 128 MB of SDRAM memory<br />
— Support for 16, 64, 128, or 256 Mbit DRAM technologies<br />
— 2 Banks of SDRAM, each supporting 64 MB of memory<br />
— Supports as many as 6 static memory devices (SRAM, Flash, or VLIO)<br />
• Clock enable (1 CKE pin is provided to put the entire SDRAM interface into self refresh)<br />
• LCD Controller pins<br />
• Bluetooth UART<br />
• MMC Controller pins<br />
• SSP Pins<br />
• USB Client Pins<br />
• AC97 Controller Pins<br />
• St<strong>and</strong>ard UART Pins<br />
<strong>PXA250</strong> <strong>and</strong> <strong>PXA210</strong> <strong>Applications</strong> <strong>Processors</strong> Design Guide 1-3