ADC JTAG I/O Intel LXT971ALC Ethernet Phy Altera EPXA1F484C3 ...
ADC JTAG I/O Intel LXT971ALC Ethernet Phy Altera EPXA1F484C3 ...
ADC JTAG I/O Intel LXT971ALC Ethernet Phy Altera EPXA1F484C3 ...
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4<br />
3<br />
2<br />
1<br />
IO-49<br />
IO-72<br />
L1Accept<br />
D<br />
IO_D1<br />
SRShClk<br />
IO-93<br />
SRMRn<br />
prog_Flash<br />
R10<br />
IO-50<br />
IO-73<br />
Y5<br />
T14<br />
Block 11 I/Os<br />
IO-108<br />
IO-94<br />
IO-109<br />
T12<br />
150R D<br />
TDI<br />
VCC2<br />
RN23<br />
2<br />
SRIO<br />
C A8<br />
IC20<br />
C<br />
B VregShdn 19<br />
E2<br />
RN7<br />
RN47<br />
to <strong>JTAG</strong> page 3<br />
UART<br />
B<br />
A A<br />
5<br />
4<br />
3<br />
2<br />
1<br />
5<br />
Clock1n<br />
to to Clock<br />
page 4<br />
page 4<br />
VregShdn 1<br />
VregShdn 2<br />
VregShdn 3<br />
VregShdn 4<br />
VregShdn 5<br />
VregShdn 6<br />
1<br />
1 2<br />
2 Clock1p<br />
Clock2n<br />
3<br />
3 4<br />
4 Clock2p<br />
5<br />
6<br />
5 6<br />
Trigger1n<br />
7<br />
8<br />
Trigger1p<br />
7 8<br />
Trigger2n<br />
9<br />
10<br />
Trigger2p<br />
9 10<br />
11<br />
12<br />
11 12<br />
ClkVar1n<br />
13<br />
13 14<br />
14<br />
ClkVar1p<br />
40MHz1n 15<br />
15 16<br />
16<br />
40MHz1p<br />
ExtInt<br />
17<br />
17 18<br />
18<br />
RxD<br />
19<br />
20<br />
TxD<br />
19 20<br />
21<br />
22<br />
Clock IO_A4<br />
21 22<br />
23<br />
IO_A2<br />
23 24<br />
24<br />
IO_A5 25<br />
26<br />
IO_A0<br />
25 26<br />
IO_A3<br />
27<br />
27 28<br />
28<br />
IO_A1<br />
IO_B7<br />
29<br />
30<br />
IO_B6<br />
IO_B5<br />
31<br />
29 30<br />
32<br />
IO_B4<br />
IO_B3<br />
3 6 33<br />
31 32<br />
34 3 6<br />
IO_B2<br />
IO_B1<br />
4 5 35<br />
33 34<br />
36 4 5<br />
IO_B0<br />
IO_D7<br />
1 8 37<br />
35 36<br />
38 1 8<br />
IO_D6<br />
IO_D5<br />
39<br />
40<br />
IO_D4<br />
37 38<br />
IO_D3<br />
41<br />
39 40<br />
42<br />
IO_D2<br />
IO_D1<br />
43<br />
41 42<br />
44<br />
IO_D0<br />
43 44<br />
45<br />
46<br />
LVDSup4n<br />
47<br />
45 46<br />
48<br />
LVDSup4p<br />
LVDSdown4n<br />
49<br />
50<br />
LVDSdown4p<br />
47 48<br />
LVDSup3n<br />
51<br />
49 50<br />
52<br />
LVDSup3p<br />
LVDSdown3n<br />
53<br />
51 52<br />
54<br />
LVDSdown3p<br />
55<br />
53 54<br />
56<br />
57<br />
55 56<br />
58<br />
59<br />
60<br />
57 58<br />
59 60<br />
61<br />
62<br />
LVDSup2n<br />
63<br />
61 62<br />
64<br />
LVDSup2p<br />
LVDSdown2n<br />
65<br />
63 64<br />
66<br />
LVDSdown2p<br />
LVDSup1n<br />
67<br />
65 66<br />
68<br />
LVDSup1p<br />
LVDSdown1n<br />
69<br />
70<br />
LVDSdown1p<br />
67 68<br />
69 70<br />
1<br />
VregShdn 8<br />
VregShdn 10<br />
VregShdn 11<br />
VregShdn 12<br />
VregShdn 13<br />
VregShdn 14<br />
VregShdn 15<br />
VregShdn 16<br />
VregShdn 17<br />
VregShdn 18<br />
VregShdn 19<br />
VregShdn 20<br />
VregShdn 21<br />
VregShdn 22<br />
VregShdn 23<br />
VregShdn 24<br />
2<br />
3<br />
1 2<br />
4 5<br />
3 4<br />
6<br />
5 6<br />
7<br />
8<br />
LVDSup5n<br />
9<br />
7 8<br />
10<br />
LVDSup5p<br />
9 10<br />
LVDSdown5n<br />
11<br />
12<br />
LVDSdown5p<br />
LVDSup6n<br />
13<br />
11 12<br />
14<br />
LVDSup6p<br />
LVDSdown6n<br />
15<br />
13 14<br />
16<br />
LVDSdown6p<br />
17<br />
15 16<br />
18<br />
19<br />
17 18<br />
20<br />
19 20<br />
21<br />
22<br />
21 22<br />
23<br />
24<br />
LVDSup7n<br />
25<br />
23 24<br />
26<br />
LVDSup7p<br />
LVDSdown7n<br />
27<br />
25 26<br />
28<br />
LVDSdown7p<br />
LVDSup8n<br />
29<br />
27 28<br />
30<br />
LVDSup8p<br />
LVDSdown8n<br />
31<br />
32<br />
LVDSdown8p<br />
29 30<br />
33<br />
31 32<br />
34<br />
35<br />
33 34<br />
36<br />
37<br />
35 36<br />
38<br />
37 38<br />
39<br />
39 40<br />
40<br />
R66 51R<br />
41<br />
42<br />
41 42<br />
1<br />
43<br />
44<br />
43 44<br />
2<br />
45<br />
46<br />
45 46<br />
3<br />
47<br />
48<br />
47 48<br />
4<br />
49<br />
50<br />
49 50<br />
51<br />
51 52<br />
52<br />
SCL<br />
53<br />
54<br />
53 54<br />
55<br />
55 56<br />
56 AAin8<br />
57<br />
57 58<br />
58<br />
AAin2<br />
59<br />
60<br />
59 60<br />
61<br />
62<br />
61 62<br />
63<br />
64<br />
63 64<br />
65<br />
66<br />
65 66<br />
67<br />
68<br />
67 68<br />
69<br />
70<br />
69 70<br />
LVDSup3n<br />
LVDSup1n<br />
LVDSup1p<br />
LVDSup2n<br />
LVDSup2p<br />
LVDSdown1p<br />
LVDSdown1n<br />
LVDSdown2p<br />
LVDSdown2n<br />
AB8<br />
AB6<br />
AA8<br />
AA7<br />
AB15<br />
VregShdn 8<br />
VregShdn 9<br />
VregShdn 10<br />
aux5<br />
TCK<br />
aux2<br />
aux1<br />
IO_B6<br />
IO_B7<br />
IO_B5<br />
AB10<br />
AA10<br />
AB9<br />
AA9<br />
IO_B1<br />
IO_B0<br />
IO_D3<br />
IO_D4<br />
IO_D2<br />
IO_B2<br />
aux5<br />
AUX4<br />
AA15<br />
AA17<br />
AA16<br />
AA14<br />
AB14<br />
LVDSdown5p<br />
LVDSdown5n<br />
LVDSdown7p<br />
LVDSdown7n<br />
LVDSdown6p<br />
LVDSdown6n<br />
LVDSdown8p<br />
LVDSdown8n<br />
LVDSup5n<br />
LVDSup7n<br />
LVDSup8n<br />
Y2<br />
Y3<br />
AA3<br />
AA4<br />
AA9<br />
AB10<br />
AA10<br />
AB9<br />
SRMRn<br />
SRShClk<br />
SROEn<br />
SRStr<br />
SRDin<br />
IO_D5<br />
IO_D7<br />
IO_B3<br />
IO_D6<br />
IO_D0<br />
AB4<br />
AUX3<br />
aux2<br />
SRDin<br />
SRShClk<br />
SROEn<br />
SRIO<br />
SRDin<br />
aux1<br />
SRIO<br />
LVDSdown3n<br />
LVDSdown4n<br />
LVDSup4n<br />
VregShdn 2<br />
VregShdn 4<br />
IO_B4<br />
aux4<br />
LVDSup6n<br />
AB17<br />
aux3<br />
TCK<br />
VregShdn 1<br />
VregShdn 2<br />
VregShdn 3<br />
VregShdn 4<br />
TD_FC<br />
VregShdn 5<br />
VregShdn 6<br />
VregShdn 7<br />
connected to<br />
<strong>JTAG</strong> page 3<br />
1V8<br />
VregShdn 11<br />
VregShdn 12<br />
VregShdn 13<br />
VregShdn 14<br />
VregShdn 15<br />
VregShdn 16<br />
VregShdn 17<br />
VregShdn 18<br />
1V8<br />
3V3<br />
3V3 1V8<br />
3V3<br />
3V3<br />
3V3<br />
AUX3<br />
SRStr<br />
AUX4<br />
3V3<br />
3V3<br />
SROEn<br />
3V3<br />
MVCC<br />
VregShdn 7<br />
VregShdn 9<br />
MRSTn<br />
connected to<br />
Flash page 6<br />
IRQFL<br />
IO_B6<br />
IO_B7<br />
IO_B5<br />
IFcfgFL<br />
LockFL<br />
IO_B3<br />
IO_B4<br />
TD_CE<br />
VregShdn 20<br />
VregShdn 21<br />
VregShdn 22<br />
VregShdn 23<br />
VregShdn 24<br />
TMS<br />
IO_B1<br />
IO_B0<br />
TTC_DQ3<br />
BCntRes<br />
TTC_DQ2<br />
TTC_DQ1<br />
TTC_DQ0<br />
IO_B2<br />
BUSYFL<br />
connected<br />
to TTCrx on<br />
page 4<br />
3V3<br />
CRSTO<br />
CRSTI<br />
GND<br />
IO_C7<br />
IO_C5<br />
IO_C3<br />
IO_C1<br />
AAin7<br />
AAin1<br />
IO_C6<br />
IO_C4<br />
IO_C2<br />
IO_C0<br />
all VregShdn pins connected on AUX connector<br />
page 7. May be configured as PCI pins.<br />
to Clock page 4<br />
RN18 may connect<br />
VRegShdn pins 7 to 10<br />
directly to FPGA if the CPLD<br />
is not populated.<br />
GND_PW<br />
SDA<br />
to AUX connector page 7<br />
to AUX connector page 7<br />
to Clock page 4<br />
connected to<br />
<strong>JTAG</strong> page 3<br />
to AUX connector page 7<br />
R57 0R_Jmpr<br />
W11<br />
T11<br />
AB10<br />
V10<br />
AA10<br />
W10<br />
Y10<br />
U10<br />
AB9<br />
T10<br />
AA9<br />
Y9<br />
W9<br />
AB8<br />
V9<br />
AA8<br />
AB6<br />
U9<br />
Y8<br />
AA7<br />
W8<br />
AB5<br />
IO-39<br />
IO-40<br />
IO-41<br />
IO-42<br />
IO-43<br />
IO-44<br />
IO-45<br />
IO-46<br />
IO-47<br />
IO-48<br />
IO-51<br />
IO-52<br />
IO-53<br />
IO-54<br />
IO-55<br />
IO-56<br />
IO-57<br />
IO-58<br />
IO-59<br />
IO-60<br />
IO-61<br />
IC1I<br />
<strong>EPXA1F484C3</strong><br />
Block 10 I/Os<br />
SerBChan<br />
R134<br />
10k<br />
to <strong>JTAG</strong> page 3<br />
Title<br />
C184<br />
100n<br />
GND_PW* -> Do not connect these GND<br />
nets directly to the plane but route via<br />
the voltage regulators and main supply<br />
decoupling capacitors !<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
DCS DIMM and LVDS port<br />
Shaded area shows<br />
devices not used for<br />
TRD/DCS<br />
2<br />
3<br />
4<br />
7<br />
6<br />
5<br />
RN46<br />
4x47R<br />
IO-62<br />
IO-63<br />
IO-64<br />
IO-65<br />
IO-66<br />
IO-67<br />
IO-68<br />
IO-69<br />
IO-70<br />
IO-71<br />
IO-74<br />
IO-75<br />
IO-76<br />
IO-77<br />
IO-78<br />
IO-79<br />
IO-80<br />
IO-81<br />
IO-82<br />
IO-83<br />
V8<br />
AA6<br />
AA5<br />
V7<br />
Y7<br />
W7<br />
Y6<br />
V5<br />
V4<br />
V6<br />
W5<br />
U6<br />
Y4<br />
U7<br />
AA4<br />
AB4<br />
U8<br />
AA3<br />
T9<br />
Y3<br />
Y2<br />
9<br />
10<br />
11<br />
12<br />
13<br />
14<br />
15<br />
16<br />
OutDn<br />
OutDp<br />
OutCn<br />
OutCp<br />
OutBn<br />
OutBp<br />
OutAn<br />
OutAp<br />
EN34<br />
8<br />
InD 7<br />
InC 6<br />
GND 5<br />
VCC 4<br />
InB 3<br />
InA 2<br />
EN12<br />
1<br />
2<br />
1<br />
IC18<br />
SN75LVDS391PW<br />
IC19<br />
C153<br />
100n<br />
RN24<br />
R166 0R_Jmpr<br />
CON14<br />
Editor : Dirk Gottschalk<br />
Size Document Number Rev<br />
A3<br />
8 1.60<br />
LED8<br />
green_0603<br />
1<br />
RN22 4x0R_Jmpr<br />
5<br />
6<br />
7<br />
8<br />
RN26 4x0R_Jmpr<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
5<br />
6<br />
7<br />
8<br />
In1p<br />
In1n<br />
In2p<br />
In2n<br />
In3p<br />
In3n<br />
In4p<br />
In4n<br />
5<br />
6<br />
7<br />
8<br />
4<br />
3<br />
2<br />
1<br />
SN75LVDT390PW<br />
4<br />
3<br />
2<br />
1<br />
4x0R_Jmpr<br />
OutDn EN34<br />
OutDp<br />
OutCn<br />
OutCp<br />
OutBn<br />
OutBp<br />
OutAn<br />
OutAp EN12<br />
4<br />
3<br />
2<br />
1<br />
EN12<br />
16<br />
Out1<br />
15<br />
Out2<br />
14<br />
VCC 13<br />
GND 12<br />
Out3<br />
11<br />
Out4<br />
10<br />
EN34<br />
9<br />
C87<br />
100n<br />
R78 0R_Jmpr<br />
UDCD<br />
TP12<br />
C150<br />
10n<br />
C157<br />
8<br />
7<br />
6<br />
5<br />
RN3<br />
4x47R<br />
IC17<br />
100n<br />
R138<br />
10k<br />
1<br />
2<br />
3<br />
4<br />
9<br />
10<br />
11<br />
12<br />
13<br />
14<br />
15<br />
16<br />
SN75LVDS391PW<br />
8<br />
7<br />
6<br />
5<br />
8<br />
InD 7<br />
InC 6<br />
5<br />
GND 5<br />
VCC 4<br />
3<br />
InB 3<br />
2<br />
InA 2<br />
1<br />
<strong>EPXA1F484C3</strong><br />
IC1G<br />
UART-CTSn<br />
F1<br />
UART-DSRn<br />
G4<br />
UART-RxD F2<br />
UART-DCDn<br />
F6<br />
UART-RIn<br />
F3<br />
UART-TxD G5<br />
UART-RTSn<br />
UART-DTRn<br />
E6<br />
R74<br />
51R<br />
RN43<br />
1<br />
4x0R_Jmpr<br />
RN45 4x0R_Jmpr<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
URI<br />
TP26<br />
R137<br />
150R<br />
CON1<br />
1 2<br />
3 4<br />
5 6<br />
Header_03x2<br />
C151<br />
100n<br />
CON13<br />
R4 0R_Jmpr<br />
C154<br />
10n<br />
1<br />
2<br />
8<br />
7<br />
RN28<br />
4x47R<br />
RN27<br />
Y16<br />
W16<br />
AA17<br />
T15<br />
AB17<br />
U15<br />
V15<br />
AA16<br />
W15<br />
Y15<br />
AB16<br />
U14<br />
AA15<br />
V14<br />
IO-84<br />
IO-85<br />
IO-86<br />
IO-87<br />
IO-88<br />
IO-89<br />
IO-90<br />
IO-91<br />
IO-92<br />
IO-95<br />
IO-96<br />
IO-97<br />
IO-98<br />
IC1J<br />
<strong>EPXA1F484C3</strong><br />
IO-99<br />
IO-100<br />
IO-101<br />
IO-102<br />
IO-103<br />
IO-104<br />
IO-105<br />
IO-106<br />
IO-107<br />
IO-110<br />
IO-111<br />
IO-112<br />
IO-113<br />
Y14<br />
R13<br />
W14<br />
T13<br />
AB15<br />
AA14<br />
U13<br />
Y13<br />
V13<br />
W13<br />
AB14<br />
AA12<br />
U12<br />
Y12<br />
R139<br />
10k<br />
R164 10k<br />
R165 10k<br />
5<br />
6<br />
7<br />
8<br />
4<br />
3<br />
2<br />
1<br />
4<br />
3<br />
2<br />
1<br />
RN25<br />
4x0R_Jmpr<br />
5<br />
6<br />
7<br />
8<br />
5<br />
6<br />
7<br />
8<br />
4x0R_Jmpr<br />
4<br />
3<br />
2<br />
1<br />
1<br />
10<br />
11<br />
12<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
9<br />
A10<br />
A11<br />
GND_B0<br />
VCCO_B0<br />
B15<br />
B12<br />
B10<br />
B8<br />
TCK<br />
VCC1<br />
36<br />
TDO 35<br />
D8<br />
34<br />
D10<br />
33<br />
D12<br />
32<br />
D15<br />
31<br />
VCCO_B1<br />
30<br />
GND_B1<br />
29<br />
C11<br />
28<br />
C10<br />
27<br />
C8<br />
26<br />
TMS 25<br />
4x0R_Jmpr<br />
4x47R<br />
C155<br />
100n<br />
R163 10k<br />
2<br />
3<br />
4<br />
7<br />
6<br />
5<br />
13<br />
14<br />
15<br />
16<br />
17<br />
18<br />
19<br />
20<br />
21<br />
22<br />
23<br />
24<br />
GND1<br />
B6<br />
B4<br />
B2<br />
B0<br />
CLK1_in<br />
CLK2_in<br />
C0<br />
C1<br />
C2<br />
C4<br />
C6<br />
A6<br />
A4<br />
A2<br />
A1<br />
A0_GOE0<br />
CLK0_in<br />
CLK3_in<br />
D0_GOE1<br />
D2<br />
D4<br />
D6<br />
GND3<br />
48<br />
47<br />
46<br />
45<br />
44<br />
43<br />
42<br />
41<br />
40<br />
39<br />
38<br />
37<br />
IC14<br />
LC4064ZC-75T48<br />
RN2<br />
4x47R<br />
R162 10k<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
2<br />
C185<br />
100n<br />
1<br />
IC1F<br />
FAST1<br />
FAST2<br />
FAST3<br />
FAST4<br />
J2<br />
K5<br />
V11<br />
W12<br />
R6 0R_Jmpr<br />
LED9<br />
red_0603<br />
R131<br />
10k<br />
C178<br />
10n<br />
R84<br />
Dedicated Fast Inputs<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
<strong>EPXA1F484C3</strong><br />
RN44<br />
4x0R_Jmpr<br />
2<br />
1<br />
LED7<br />
green_0603<br />
R85 150R<br />
C223<br />
100n<br />
C5<br />
C152<br />
10n<br />
1<br />
2<br />
8<br />
7<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
In1p<br />
In1n<br />
In2p<br />
In2n<br />
In3p<br />
In3n<br />
In4p<br />
In4n<br />
SN75LVDT390PW<br />
EN12<br />
16<br />
Out1<br />
15<br />
Out2<br />
14<br />
VCC 13<br />
GND 12<br />
Out3<br />
11<br />
Out4<br />
10<br />
EN34<br />
9<br />
4x47R<br />
10n<br />
RN18 4x0R_Jmpr<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
C156<br />
100n<br />
Date: 2005.02.14 12:00<br />
Sheet 8 of<br />
14
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