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ADC JTAG I/O Intel LXT971ALC Ethernet Phy Altera EPXA1F484C3 ...

ADC JTAG I/O Intel LXT971ALC Ethernet Phy Altera EPXA1F484C3 ...

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5<br />

4<br />

3<br />

2<br />

1<br />

D<br />

GND_PW<br />

J3<br />

1 2<br />

GND_<strong>ADC</strong><br />

GND_<strong>ADC</strong><br />

GND_TPLL<br />

J8<br />

1 2<br />

GND_PLL<br />

D<br />

B2S<br />

B2S<br />

J2<br />

1 2<br />

GND_PLLF<br />

GND_PLLF<br />

B2S<br />

J4<br />

1 2<br />

GND_ETH<br />

GND_ETH<br />

B2S<br />

C<br />

C<br />

J5<br />

1 2<br />

GND_TPLL<br />

GND_TPLL<br />

B2S<br />

J6<br />

1 2<br />

GND<br />

GND<br />

B2S<br />

B<br />

J7<br />

1 2<br />

GND<br />

GND<br />

B<br />

B2S<br />

J1<br />

1 2<br />

GND<br />

GND<br />

B2S<br />

J9<br />

1 2<br />

GND<br />

GND<br />

B2S<br />

A<br />

Company : KIP Uni-Heidelberg / Lindenstruth<br />

Editor : Dirk Gottschalk<br />

A<br />

Title<br />

DCS Ground Scheme<br />

Size Document Number Rev<br />

A<br />

14 1.60<br />

5<br />

4<br />

3<br />

Date: 2005.05.02<br />

Sheet 14 of<br />

14<br />

2<br />

1

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