ADC JTAG I/O Intel LXT971ALC Ethernet Phy Altera EPXA1F484C3 ...
ADC JTAG I/O Intel LXT971ALC Ethernet Phy Altera EPXA1F484C3 ...
ADC JTAG I/O Intel LXT971ALC Ethernet Phy Altera EPXA1F484C3 ...
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5<br />
4<br />
3<br />
2<br />
1<br />
Power Input<br />
D<br />
<strong>ADC</strong><br />
Inputs<br />
<strong>ADC</strong><br />
Page 10<br />
Flash<br />
EPROM<br />
ECC optional<br />
Page 6<br />
SDRAM<br />
Page 2<br />
4...6 Volt Main Power Supply<br />
Power Regulators<br />
Page 5<br />
+5 Volt<br />
charge<br />
pump<br />
D<br />
<strong>JTAG</strong><br />
connectors<br />
<strong>JTAG</strong> I/O<br />
Page 3<br />
1,8 Volt 3,3 Volt<br />
C<br />
CMC Connector<br />
Page 7<br />
C<br />
<strong>Ethernet</strong> and<br />
Power<br />
Connector<br />
<strong>Intel</strong><br />
<strong>LXT971ALC</strong><br />
<strong>Ethernet</strong> <strong>Phy</strong><br />
Page 9<br />
<strong>Altera</strong><br />
<strong>EPXA1F484C3</strong><br />
FPGA<br />
FPGA Decoupling on Page 11<br />
TTCrx and<br />
PLL Clock<br />
Recovery<br />
Page 4<br />
Optical<br />
Link<br />
Page 4<br />
B<br />
B<br />
CPLD serial shiftregisters<br />
for slow I/Os. Page 8<br />
I²C Bus<br />
DCS to ROB Connector<br />
Page 8<br />
A<br />
see grounding scheme on page 14 see<br />
PLL configuration table on page 13<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
Title<br />
Overview for the DCS board<br />
Editor : Dirk Gottschalk<br />
A<br />
Size Document Number Rev<br />
A4<br />
01 1.63-1<br />
Date: 2005.12.20 10:30<br />
Sheet 1 of<br />
14<br />
5<br />
4<br />
3<br />
2<br />
1
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
D<br />
C<br />
C<br />
SDQ[15:0]<br />
B20<br />
C20<br />
F18<br />
C21<br />
E20<br />
F19<br />
F20<br />
G18<br />
H19<br />
G20<br />
E22<br />
H18<br />
G21<br />
H20<br />
H17<br />
H22<br />
SDQ0<br />
SDQ1<br />
SDQ2<br />
SDQ3<br />
SDQ4<br />
SDQ5<br />
SDQ6<br />
SDQ7<br />
SDQ8<br />
SDQ9<br />
SDQ10<br />
SDQ11<br />
SDQ12<br />
SDQ13<br />
SDQ14<br />
SDQ15<br />
MT48LC16M16_TSOP54<br />
IC5<br />
B<br />
B13<br />
G13<br />
D13<br />
A15<br />
F13<br />
C13<br />
E13<br />
D14<br />
DQM-ECC<br />
DQS-ECC<br />
DQ-ECC0<br />
DQ-ECC1<br />
DQ-ECC2<br />
DQ-ECC3<br />
DQ-ECC4<br />
DQ-ECC5<br />
DQ0<br />
DQ1<br />
DQ2<br />
DQ3<br />
DQ4<br />
DQ5<br />
DQ6<br />
DQ7<br />
DQ8<br />
DQ9<br />
DQ10<br />
DQ11<br />
DQ12<br />
DQ13<br />
DQ14<br />
DQ15<br />
IC1B<br />
<strong>EPXA1F484C3</strong><br />
SDRAM Interface<br />
SDRAM Interface pins are not<br />
available as user I/Os!<br />
These pins are reserved<br />
for future functionallity<br />
and should be left<br />
unconnected<br />
SDA0<br />
SDA1<br />
SDA2<br />
SDA3<br />
SDA4<br />
SDA5<br />
SDA6<br />
SDA7<br />
SDA8<br />
SDA9<br />
SDA10<br />
SDA11<br />
SDA12<br />
SDA13-BA0<br />
SDA14-BA1<br />
CLK<br />
CLKn<br />
CASn<br />
CLKE<br />
RAS<br />
WEn<br />
DQM0<br />
DQM1<br />
CS-N0<br />
CS-N1<br />
DQS0<br />
DQS1<br />
DDR-VS0<br />
DDR-VS1<br />
DDR-VS2<br />
B17<br />
G16<br />
D16<br />
F16<br />
A19<br />
E16<br />
B18<br />
F17<br />
C17<br />
D17<br />
B19<br />
D18<br />
D19<br />
C19<br />
E18<br />
C15<br />
J16<br />
A17<br />
E15<br />
C14<br />
F14<br />
E21<br />
J20<br />
G15<br />
B16<br />
D22<br />
J17<br />
D21<br />
G22<br />
B15<br />
R8<br />
10k<br />
R7<br />
10k<br />
3V3<br />
RN20<br />
4x330R<br />
SDR_CLK<br />
SDR_SDR_<br />
SDR_CKE<br />
SDR_RAS<br />
SDR_WE<br />
SDR_DQML<br />
SDR_DQMH<br />
SDR_CS<br />
RN32<br />
4x330R<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
3V3<br />
RN21<br />
4x330R<br />
RN38<br />
4x330R<br />
3V3<br />
23<br />
24<br />
25<br />
26<br />
29<br />
30<br />
31<br />
32<br />
33<br />
34<br />
22<br />
35<br />
36<br />
20<br />
21<br />
38<br />
17<br />
37<br />
15<br />
39<br />
18<br />
16<br />
19<br />
1<br />
14<br />
27<br />
3<br />
9<br />
43<br />
49<br />
6<br />
12<br />
46<br />
52<br />
A0<br />
A1<br />
A2<br />
A3<br />
A4<br />
A5<br />
A6<br />
A7<br />
A8<br />
A9<br />
A10<br />
A11<br />
A12<br />
BA0<br />
BA1<br />
CLK<br />
CAS<br />
CKE<br />
DQML<br />
DQMH<br />
RAS<br />
WE<br />
CS<br />
VDD1<br />
VDD2<br />
VDD3<br />
VDDQ1<br />
VDDQ2<br />
VDDQ3<br />
VDDQ4<br />
VSSQ1<br />
VSSQ2<br />
VSSQ3<br />
VSSQ4<br />
DQ0<br />
2<br />
DQ1<br />
4<br />
DQ2<br />
5<br />
7<br />
DQ3<br />
8<br />
DQ4<br />
DQ5<br />
10<br />
DQ6<br />
11<br />
DQ7<br />
13<br />
DQ8<br />
42<br />
44<br />
DQ9<br />
DQ10<br />
45<br />
DQ11<br />
47<br />
DQ12<br />
48<br />
DQ13<br />
50<br />
51<br />
DQ14<br />
53<br />
DQ15<br />
GND1<br />
GND2<br />
GND3<br />
28<br />
41<br />
54<br />
NC 40<br />
SDQ0<br />
SDQ1<br />
SDQ2<br />
SDQ3<br />
SDQ4<br />
SDQ5<br />
SDQ6<br />
SDQ7<br />
SDQ8<br />
SDQ9<br />
SDQ10<br />
SDQ11<br />
SDQ12<br />
SDQ13<br />
SDQ14<br />
SDQ15<br />
GND<br />
B<br />
A<br />
3V3<br />
C15<br />
C13<br />
C12<br />
C94<br />
C91<br />
C9<br />
C10<br />
C16<br />
A<br />
10n<br />
47n<br />
10n<br />
47n<br />
10n<br />
47n<br />
10n<br />
47n<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
Editor : Dirk Gottschalk<br />
Title<br />
DCS SDRAM Interface<br />
Size Document Number Rev<br />
A3<br />
02 1.60<br />
Date: 2003.12.19 14:00<br />
Sheet 2 of<br />
14<br />
5<br />
4<br />
3<br />
2<br />
1
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
C<br />
B<br />
A<br />
MTDIp<br />
MTDIn<br />
connected to<br />
<strong>ADC</strong> page 10<br />
3V3<br />
3V3<br />
L1intTrig<br />
CRSTO<br />
GND<br />
ARdyn<br />
ADout<br />
ADin<br />
ADMCLK<br />
Header_07x2x2mm<br />
<strong>JTAG</strong> Master Output<br />
AP1<br />
AP2<br />
ARstn<br />
ACSn<br />
IO_C7<br />
page 4 TTCrx<br />
C83<br />
470n<br />
CON9<br />
1 2<br />
3 4<br />
5 6<br />
7 8<br />
9 10<br />
1112<br />
1314<br />
R97<br />
C82<br />
100n<br />
page 8 DCS-ROB con<br />
100R<br />
3V3<br />
R102<br />
10k<br />
C76<br />
10n<br />
RN5 4x22R<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
1<br />
2<br />
3<br />
4<br />
RN6<br />
8<br />
7<br />
6<br />
5<br />
4x22R<br />
C225<br />
1n<br />
VErrIn<br />
Shaded area shows<br />
devices not used for<br />
KIP/TRD<br />
K18<br />
IO-139<br />
K19<br />
IO-137<br />
K20<br />
IO-143<br />
K21<br />
IO-145<br />
K15<br />
IO-140<br />
L15<br />
IO-142<br />
L16<br />
IO-144<br />
K17<br />
IO-138<br />
IC29 acts as a<br />
level translator<br />
from 1V8 to<br />
3V3.<br />
MTCK<br />
1V8<br />
IC4<br />
2<br />
OUTA<br />
3<br />
OUTA<br />
6<br />
OUTB<br />
5<br />
OUTB<br />
10<br />
OUTC<br />
11<br />
OUTC<br />
14<br />
OUTD<br />
13<br />
OUTD<br />
AM26LV31C_SO16<br />
1V8<br />
nCfgNext<br />
1V8<br />
differential <strong>JTAG</strong> interface driver<br />
C224<br />
1n<br />
<strong>EPXA1F484C3</strong><br />
IC1L<br />
L17<br />
IO-147<br />
IO-150<br />
L18<br />
IO-149<br />
IO-153<br />
L19<br />
IO-141<br />
L20<br />
Block 13 I/Os<br />
IO-151<br />
IO-146<br />
IO-148<br />
VCC 16<br />
GND<br />
8<br />
R98<br />
2k2<br />
R81<br />
100R<br />
R83<br />
100R<br />
C88<br />
100n<br />
IO-159<br />
R22<br />
IO-158<br />
P22<br />
IO-156<br />
P20<br />
R159<br />
IC29<br />
LMV7239M5<br />
3V3<br />
M19<br />
M17<br />
M16<br />
L21 ASclk<br />
C95<br />
1n<br />
+V 5<br />
Out<br />
1<br />
-V<br />
2<br />
R87<br />
100k<br />
3V3<br />
Boot_Fl<br />
TTCrx page 4<br />
10k<br />
4<br />
-In<br />
+In<br />
3<br />
SCL<br />
SDA<br />
MTMS<br />
IO-157<br />
N22<br />
IO-154<br />
N16<br />
E_MJTG<br />
IO-155<br />
M22<br />
MTDI<br />
IO-152<br />
M20<br />
INA 1<br />
INB 7<br />
INC 9<br />
IND 15<br />
G 4<br />
G 12<br />
R160<br />
C136<br />
R18<br />
100k<br />
10n<br />
IC8<br />
10k<br />
ShdwnNext<br />
1<br />
Sense1 VCC 8<br />
2<br />
7<br />
Sense2 WDI<br />
3<br />
PFI PFO 6<br />
4<br />
GND RST<br />
5<br />
TPS3306-18DGK<br />
power supply supervisor<br />
and watchdog timer<br />
Test_Point<br />
TP29<br />
1<br />
R161<br />
WD_In<br />
TP2<br />
1<br />
IO_C1<br />
R90<br />
3k3<br />
3<br />
R91<br />
47k<br />
IO_C6<br />
IO_C3<br />
330R<br />
TD_CE<br />
IO_C4<br />
IO_C2<br />
page 8<br />
DCS-ROB<br />
con<br />
MTDO<br />
D19<br />
2<br />
1<br />
BAR43A<br />
page 4 TTCrx<br />
C86<br />
100n<br />
1<br />
2<br />
R121<br />
150R<br />
4<br />
5<br />
IC27<br />
page 8 DCS-ROB con<br />
3V3<br />
Out<br />
VCC<br />
connected to<br />
TTCrx page 4<br />
Dout0<br />
1<br />
LED6<br />
green_0603<br />
ShdwnNext<br />
IO_C5<br />
TTC_rdy<br />
MRSTn<br />
TP13<br />
GND 3<br />
B 2<br />
A 1<br />
NC7SV86P5X<br />
R132<br />
10k<br />
R15<br />
4k7<br />
Init_Done<br />
TP4<br />
1<br />
to TTCrx<br />
page 4<br />
Dout1<br />
Dout2<br />
Dout3<br />
Dout4<br />
Dout5<br />
R88<br />
1<br />
2<br />
R117 10k<br />
0R_Jmpr<br />
1<br />
D16<br />
3<br />
BAR43A<br />
optional<br />
R115<br />
0R_Jmpr<br />
R116<br />
TP3 nSTATUS<br />
C89<br />
1n<br />
R24<br />
4k7<br />
3V3<br />
K4<br />
RDYnBSY<br />
*<br />
AB12<br />
nSTATUS<br />
R4<br />
nCONFIG<br />
R5<br />
MSEL0<br />
T3<br />
MSEL1<br />
K7<br />
INIT-DONE<br />
*<br />
V12<br />
CONF-DONE<br />
P19<br />
nCE<br />
H3<br />
nCEO<br />
N20<br />
nCS<br />
*<br />
P17<br />
CS<br />
*<br />
P16<br />
nRS<br />
*<br />
M21<br />
nWS<br />
*<br />
P18<br />
10k<br />
DATA0<br />
K3<br />
DATA1<br />
*<br />
J1<br />
DATA2<br />
*<br />
L5<br />
DATA3<br />
*<br />
L4<br />
DATA4<br />
*<br />
L6<br />
DATA5<br />
*<br />
L22<br />
DATA6<br />
*<br />
M18<br />
DATA7<br />
*<br />
R16<br />
DCLK<br />
L7<br />
CLKUSR<br />
*<br />
H4<br />
nRESET<br />
H1<br />
nPOR<br />
R22<br />
10k<br />
debug_en must be high<br />
to switch off internal<br />
watchdog timer for<br />
testing and debugging!<br />
TMS<br />
page 8 DCS-ROB con<br />
page 6 flash eprom<br />
RSTn<br />
RSTn<br />
page 8 DCS-ROB con<br />
MRSTn<br />
IC1D<br />
<strong>EPXA1F484C3</strong><br />
3V3<br />
Configuration pins and ports<br />
Pins with an (*) are available as<br />
user I/O, too.<br />
VERR<br />
Debug_EN<br />
TCK<br />
TD_FC<br />
DEBUG-EN<br />
JSELECT<br />
TCK<br />
Y11<br />
TDI<br />
T20<br />
TDO<br />
J4<br />
TMS<br />
U11<br />
TRST<br />
J6<br />
Proc-TCK<br />
G3<br />
Proc-TDI<br />
G7<br />
Proc-TDO<br />
G2<br />
Proc-TMS<br />
H6<br />
G6<br />
Proc-TRST<br />
Boot-Flash<br />
page 5 power<br />
K6<br />
H5<br />
J5<br />
PTDO<br />
* DEV-OE<br />
U16<br />
* DEV-CLRn<br />
R20<br />
EN_SELECT<br />
EN_SELECT is reserved for future use. Connect to GND.<br />
R21 100R<br />
R76<br />
0R_Jmpr<br />
C80<br />
10n<br />
R14<br />
10k<br />
H2<br />
nCfgIn<br />
PTCK<br />
TP21<br />
TP23<br />
1<br />
1<br />
Header_05x2x2mm<br />
standart <strong>JTAG</strong> IF<br />
1 2<br />
3 4<br />
5 6<br />
7 8<br />
9 10<br />
1<br />
1<br />
PTDI<br />
TP22<br />
1<br />
3V3<br />
1<br />
2<br />
3<br />
4<br />
TP25<br />
3V3<br />
RN42<br />
4x10k<br />
PTRST<br />
E_Pause<br />
8<br />
7<br />
6<br />
5<br />
IO_C0<br />
connected to<br />
<strong>Ethernet</strong> page 9<br />
DEV-OE and DEV-CLRn<br />
where expected not to be<br />
used as dedicated pins<br />
C26<br />
1n<br />
R104<br />
330R<br />
TP24<br />
PTMS<br />
CON4<br />
1<br />
OC3<br />
4<br />
2 3<br />
LTV357T<br />
TCK<br />
TD_EF<br />
TMS<br />
<strong>JTAG</strong>_Drvr_Dis<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
RN4<br />
4x10k<br />
R56<br />
3k3<br />
R55<br />
C227<br />
10n<br />
10k<br />
nShdwn<br />
MTDI<br />
3V3<br />
CRSTI<br />
page 8 DCS-ROB<br />
con<br />
page 5 power<br />
4<br />
3<br />
OC1<br />
LTV357T<br />
C78<br />
470n<br />
C230<br />
1n<br />
R67<br />
10k<br />
1<br />
2<br />
3V3<br />
3<br />
13<br />
5<br />
11<br />
C77<br />
100n<br />
IC6<br />
OUTA<br />
OUTB<br />
OUTC<br />
OUTD<br />
4<br />
G<br />
12<br />
G<br />
R77<br />
10k<br />
C149<br />
10n<br />
VCC 16<br />
GND<br />
8<br />
4<br />
3<br />
4<br />
3<br />
4<br />
3<br />
INA 2<br />
INA 1<br />
INB 14<br />
INB 15<br />
INC 6<br />
INC 7<br />
IND 10<br />
IND 9<br />
AM26LV32C_SO16<br />
differential <strong>JTAG</strong><br />
interface receiver<br />
OC4<br />
LTV357T<br />
OC5<br />
LTV357T<br />
OC2<br />
LTV357T<br />
AN_GND<br />
TDOFn<br />
TDOFp<br />
1<br />
2<br />
C109<br />
1<br />
2<br />
1<br />
2<br />
R61<br />
150R<br />
R73<br />
150R<br />
C190<br />
10n<br />
C148<br />
10n<br />
10n<br />
R170<br />
100R<br />
R171<br />
100R<br />
R172<br />
100R<br />
Header_07x2x2mm<br />
<strong>JTAG</strong> Input<br />
CON5<br />
1 2<br />
3 4<br />
5 6<br />
7 8<br />
9 10<br />
1112<br />
1314<br />
R65<br />
150R<br />
R101<br />
150R<br />
R173<br />
100R<br />
AN_GND ( adjacent<br />
neibourhood board ground )<br />
D<br />
C<br />
B<br />
A<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
Editor : Dirk Gottschalk<br />
Title<br />
DCS <strong>JTAG</strong> Interface<br />
Size Document Number Rev<br />
A3<br />
03 1.62<br />
5<br />
4<br />
3<br />
2<br />
Date: 2005.02.18 13:40<br />
Sheet 3 of<br />
14<br />
1
D<br />
C<br />
B<br />
A<br />
R169<br />
for HFBR2316<br />
0R_Jmpr<br />
for TRR-1B43<br />
TRR-1B43<br />
or HFBR-2316T<br />
HFBR-2416<br />
may fit, too,<br />
but pulse width<br />
distortion is<br />
worth than<br />
HFBR-2316T<br />
Pin<br />
2<br />
3<br />
6<br />
7<br />
0R_Jmpr<br />
R168<br />
OR1<br />
BCntStrb<br />
BCnt8<br />
EvCntLStr<br />
BrcstStr2<br />
BCnt9<br />
BCnt3<br />
BCnt4<br />
SerBChan<br />
BCnt0<br />
BCnt1<br />
EVCntRes<br />
BCnt10<br />
BCnt5<br />
Brcst5<br />
BCnt6<br />
BCnt7<br />
Brcst4<br />
Brcst7<br />
BCnt11<br />
EvCntHStr<br />
R167 0R_Jmpr<br />
for TRR-1B43<br />
NC4<br />
P1<br />
P2<br />
NC3<br />
NC1<br />
Out<br />
V_O<br />
NC2<br />
HFBR-2316T<br />
Out<br />
VEE/GND<br />
VCC<br />
GND<br />
U4<br />
IO-0<br />
W3<br />
IO-1<br />
T5<br />
IO-2<br />
T4<br />
IO-3<br />
V3<br />
IO-4<br />
T6<br />
IO-5<br />
W2<br />
IO-6<br />
T7<br />
IO-7<br />
U3<br />
IO-8<br />
W1<br />
IO-9<br />
T8<br />
IO-10<br />
V2<br />
IO-11<br />
U2<br />
IO-12<br />
R3<br />
IO-13<br />
P5<br />
IO-14<br />
P4<br />
IO-15<br />
R7<br />
IO-16<br />
R2<br />
IO-17<br />
P3<br />
IO-18<br />
P6<br />
IO-19<br />
5<br />
for HFBR2316<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
R31<br />
2R2<br />
*! keep this GND connection<br />
near/between TTCrx and IC28 !<br />
Please see grounding scheme<br />
for PLL layout on page 12.<br />
for HFBR2316<br />
TRR-1B43<br />
Outn<br />
Outp<br />
GND<br />
VCC<br />
C129<br />
10n<br />
C121<br />
10n<br />
R27<br />
0R_Jmpr<br />
C130<br />
100n<br />
C122<br />
100n<br />
for HFBR2316<br />
5V<br />
R30 0R_Jmpr<br />
for TRR-1B43<br />
Shaded area shows<br />
devices not used for<br />
KIP/DCS<br />
R32<br />
2R2<br />
C123<br />
470n<br />
R29<br />
0R_Jmpr<br />
3V3<br />
SCL<br />
SDA<br />
5V<br />
AUX connector page 7<br />
to <strong>JTAG</strong> page 3<br />
C127<br />
10uF<br />
R26<br />
100R<br />
C120<br />
10n<br />
C119<br />
10n<br />
R1 Brcst6<br />
IO-20<br />
P7 SinErr<br />
IO-21<br />
BCnt2<br />
IO-22<br />
P2<br />
ClkL1Acc<br />
IO-23<br />
P1<br />
N5 Brcst3<br />
IC1H<br />
IO-24<br />
BrcstStr1<br />
IO-25<br />
N4<br />
N6 Brcst2<br />
IO-26<br />
N3 SubAd7<br />
<strong>EPXA1F484C3</strong><br />
IO-27<br />
N2 SubAd0<br />
IO-28<br />
N7 DBErr<br />
IO-29<br />
N1 SubAd1<br />
IO-30<br />
SubAd2<br />
IO-31<br />
M5<br />
Block 9 I/Os<br />
M4 SubAd4<br />
IO-32<br />
SubAd6<br />
IO-33<br />
M3<br />
SubAd3<br />
IO-34<br />
M6<br />
DoutStr<br />
IO-35<br />
L1<br />
SubAd5<br />
IO-36<br />
M7<br />
L2 Dout7<br />
IO-37<br />
L3 Dout6<br />
IO-38<br />
C96<br />
100n<br />
R62<br />
2k2<br />
3V3<br />
SCL<br />
SDA<br />
3V3<br />
R25<br />
100R<br />
BCnt0<br />
BCnt1<br />
BCnt2<br />
BCnt3<br />
BCnt4<br />
BCnt6<br />
BCnt7<br />
BCnt8<br />
BCnt9<br />
BCnt10<br />
BCnt11<br />
EvCntHStr<br />
EvCntLStr<br />
BCntStrb<br />
Brcst2<br />
Brcst3<br />
Brcst4<br />
Brcst5<br />
Brcst6<br />
Brcst7<br />
BrcstStr1<br />
BrcstStr2<br />
EVCntRes<br />
BCntRes<br />
VCC_In<br />
nShdwn<br />
3V3<br />
C117<br />
100n<br />
C118<br />
100n<br />
R112<br />
10k<br />
BCnt0<br />
BCnt1<br />
BCnt2<br />
BCnt3<br />
BCnt4<br />
BCnt5<br />
BCnt6<br />
BCnt7<br />
BCnt8<br />
BCnt9<br />
BCnt10<br />
BCnt11<br />
Brcst2<br />
Brcst3<br />
Brcst4<br />
Brcst5<br />
Brcst6<br />
Brcst7<br />
ROB connector page 8<br />
R13<br />
2R2<br />
R63<br />
2k2<br />
C98<br />
100n<br />
4<br />
R123<br />
2R2<br />
C125<br />
100n<br />
R11 2R2<br />
C93<br />
470n<br />
5<br />
6<br />
7<br />
8<br />
C90<br />
10n<br />
4<br />
3<br />
2<br />
1<br />
R9<br />
10k<br />
C186<br />
10n<br />
RN29 4x10k<br />
F1<br />
In<br />
G1<br />
In_b<br />
H3<br />
SCL<br />
J2<br />
SDA<br />
C1<br />
PromD<br />
D3<br />
PromReset<br />
E5<br />
PromClk<br />
L7<br />
BCnt0<br />
M7<br />
BCnt1<br />
G7<br />
BCnt2<br />
K6<br />
BCnt3<br />
M6<br />
BCnt4<br />
L6<br />
BCnt5<br />
J6<br />
BCnt6<br />
J5<br />
BCnt7<br />
M5<br />
BCnt8<br />
L5<br />
BCnt9<br />
L4<br />
BCnt10<br />
H6<br />
BCnt11<br />
EvCntHStr J7<br />
EvCntLStr<br />
EvCntHStr<br />
K8<br />
BCntStrb<br />
EvCntLStr<br />
L8<br />
BCntStrb<br />
D12<br />
Brcst2<br />
D11<br />
Brcst3<br />
J11<br />
Brcst4<br />
J10<br />
Brcst5<br />
K11<br />
Brcst6<br />
K9<br />
Brcst7<br />
BrcstStr1 D10<br />
BrcstStr2<br />
BrcstStr1<br />
K12<br />
BrcstStr2<br />
EVCntRes L9<br />
EvCntRes<br />
M9<br />
BCntRes<br />
C97<br />
470n<br />
C188<br />
100n<br />
AVDD2<br />
AVDD1<br />
G3<br />
G4<br />
C100<br />
10n<br />
C92<br />
100n<br />
*!<br />
OSC1<br />
Keep
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
C<br />
GND layer trace<br />
to power input<br />
connectors<br />
VIAs<br />
interrupt GND plane<br />
here. Route to top<br />
layer. Connect all<br />
VReg capacitors to<br />
this vias. Do not<br />
connect caps<br />
directly to plane.<br />
VReg<br />
R147 20k<br />
R141<br />
top layer to<br />
Vreg GND<br />
connection<br />
GND layer<br />
trace to board<br />
ground plane<br />
Header_02x1<br />
CON3<br />
Welwyn LR or equ.<br />
1<br />
2<br />
1<br />
2<br />
Welwyn LR or equ.<br />
All capacitors are 10 Volt minimum.<br />
Kelvin connections to caps preferred!<br />
R60<br />
0.2R/1W<br />
330uF/10V<br />
+ C11<br />
R150<br />
20k Connector for current<br />
and input voltage<br />
measurement<br />
0.1R/1W<br />
nShdwn<br />
VCC_In<br />
C84<br />
22uF<br />
D18<br />
3<br />
C131<br />
100n<br />
BAT54C<br />
2<br />
1<br />
R39<br />
10k<br />
1V8/1,5A<br />
R36<br />
10k<br />
C226<br />
10n<br />
C8<br />
10n<br />
2<br />
1<br />
TO220-5<br />
LP3962ET-1.8<br />
IC11<br />
Vin<br />
SD<br />
GND<br />
3<br />
TO220-5<br />
LP3963ET-3.3<br />
IC12<br />
6<br />
TAB<br />
6<br />
Vout<br />
4<br />
ERR 5<br />
5<br />
4<br />
3<br />
2<br />
1<br />
DQ[15:0]<br />
DQ0<br />
DQ1<br />
DQ2<br />
DQ3<br />
DQ4<br />
DQ5<br />
DQ6<br />
DQ7<br />
DQ8<br />
DQ9<br />
DQ10<br />
DQ11<br />
DQ12<br />
DQ13<br />
DQ14<br />
DQ15<br />
D10<br />
F10<br />
C10<br />
E10<br />
A10<br />
G11<br />
B10<br />
F11<br />
D11<br />
E11<br />
C11<br />
B11<br />
F12<br />
A12<br />
E12<br />
B12<br />
EBIA0 :<br />
see<br />
<strong>Altera</strong><br />
AN143<br />
A[19:0]<br />
3V3<br />
R82<br />
10k<br />
IRQFL<br />
D<br />
C<br />
B<br />
EBI-DQ0<br />
EBI-DQ1<br />
EBI-DQ2<br />
EBI-DQ3<br />
EBI-DQ4<br />
EBI-DQ5<br />
EBI-DQ6<br />
EBI-DQ7<br />
EBI-DQ8<br />
EBI-DQ9<br />
EBI-DQ10<br />
EBI-DQ11<br />
EBI-DQ12<br />
EBI-DQ13<br />
EBI-DQ14<br />
EBI-DQ15<br />
IC1C<br />
<strong>EPXA1F484C3</strong><br />
Expansion Bus Interface (EBI) Block 6<br />
EBI pins are not available as user I/Os<br />
ACK is claimed to be<br />
unreliable in Errata Sheet ver.<br />
1.2 Febr. 2003 page2 !! So<br />
ACK should not be used !<br />
EBI-A0<br />
EBI-A1<br />
EBI-A2<br />
EBI-A3<br />
EBI-A4<br />
EBI-A5<br />
EBI-A6<br />
EBI-A7<br />
EBI-A8<br />
EBI-A9<br />
EBI-A10<br />
EBI-A11<br />
EBI-A12<br />
EBI-A13<br />
EBI-A14<br />
EBI-A15<br />
EBI-A16<br />
EBI-A17<br />
EBI-A18<br />
EBI-A19<br />
EBI-A20<br />
EBI-A21<br />
EBI-A22<br />
EBI-A23<br />
EBI-A24<br />
EBI-WEn<br />
EBI-OEn<br />
EBI-BE0<br />
EBI-BE1<br />
EBI-CS0<br />
EBI-CS1<br />
EBI-CS2<br />
EBI-CS3<br />
EBI-ACK<br />
EBI-CLK<br />
C5<br />
A4<br />
D7<br />
A5<br />
E7<br />
B6<br />
C7<br />
A6<br />
F8<br />
B7<br />
D8<br />
C8<br />
E8<br />
A7<br />
G9<br />
B8<br />
F9<br />
A8<br />
E9<br />
C9<br />
D9<br />
B9<br />
H10<br />
A9<br />
G10<br />
G8<br />
D2<br />
D1<br />
H9<br />
C2<br />
B3<br />
D3<br />
C4<br />
B4<br />
C3<br />
A0<br />
A1<br />
A2<br />
A3<br />
A4<br />
A5<br />
A6<br />
A7<br />
A8<br />
A9<br />
A10<br />
A11<br />
A12<br />
A13<br />
A14<br />
A15<br />
A16<br />
A17<br />
A18<br />
A19<br />
A20<br />
R1<br />
RN1 4x10k<br />
5<br />
6<br />
7<br />
8<br />
0R_Jmpr<br />
R111 0R_Jmpr<br />
4<br />
3<br />
2<br />
1<br />
A0 25<br />
A1 24<br />
A2 23<br />
A3 22<br />
A4 21<br />
A5 20<br />
A6 19<br />
A7 18<br />
A8 8<br />
A9 7<br />
A10 6<br />
A11 5<br />
A12 4<br />
A13 3<br />
A14 2<br />
A15 1<br />
A16 48<br />
A17 17<br />
A18 16<br />
A19 9<br />
A20 10<br />
13<br />
47<br />
28<br />
12<br />
11<br />
26<br />
37<br />
IC2<br />
AM29LV640D-TSSOP48<br />
DQ0<br />
A0 DQ0<br />
29<br />
DQ1<br />
A1 DQ1<br />
31<br />
DQ2<br />
A2 DQ2<br />
33<br />
DQ3<br />
A3 DQ3<br />
35<br />
DQ4<br />
A4 DQ4<br />
38<br />
DQ5<br />
A5 DQ5<br />
40<br />
DQ6<br />
A6 DQ6<br />
42<br />
DQ7<br />
A7 DQ7<br />
44<br />
DQ8<br />
A8 DQ8<br />
30<br />
DQ9<br />
A9 DQ9<br />
32<br />
DQ10<br />
A10 DQ10<br />
34<br />
DQ11<br />
A11 DQ11<br />
36<br />
DQ12<br />
A12 DQ12<br />
39<br />
DQ13<br />
A13 DQ13<br />
41<br />
DQ14<br />
A14 DQ14<br />
43<br />
DQ15<br />
A15 DQ15/A-1<br />
45<br />
A16<br />
A17 RY/BY 15 RDY_BSY<br />
A18<br />
A19 WP/ACC 14<br />
A20<br />
A21<br />
BYTE<br />
OE<br />
RST<br />
WE<br />
CE<br />
VCC<br />
R3<br />
GND1<br />
27<br />
GND2<br />
46<br />
0R_Jmpr<br />
3V3<br />
R5<br />
10k<br />
R75<br />
10k<br />
1<br />
2<br />
3<br />
4<br />
A12 5<br />
A11 6<br />
A10 7<br />
A9 8<br />
A8 9<br />
A7 10<br />
A6 11<br />
12<br />
13<br />
A5 14<br />
A4 15<br />
A3 16<br />
A2 17<br />
A1 18<br />
A0 19<br />
20<br />
21<br />
22<br />
23<br />
24<br />
IC3<br />
RSTn<br />
CEn<br />
WEn<br />
OEn<br />
A12<br />
A11<br />
A10<br />
A9<br />
A8<br />
A7<br />
A6<br />
VCC<br />
GND<br />
A5<br />
A4<br />
A3<br />
A2<br />
A1<br />
A0<br />
BHEn<br />
res1<br />
IF_cfg<br />
Lockn<br />
ID0<br />
DiskOnChip Millenium Plus 16/32MB<br />
GND2<br />
48<br />
IRQn<br />
47<br />
D15<br />
46<br />
D14<br />
45<br />
D13<br />
44<br />
D12<br />
43<br />
D11<br />
42<br />
D10<br />
41<br />
D9<br />
40<br />
D8<br />
39<br />
res2<br />
38<br />
VCCQ 37<br />
GND3<br />
36<br />
D7<br />
35<br />
D6<br />
34<br />
D5<br />
33<br />
D4<br />
32<br />
D3<br />
31<br />
D2<br />
30<br />
D1<br />
29<br />
D0<br />
28<br />
busyn<br />
27<br />
ID1<br />
26<br />
GND4<br />
25<br />
MD2811-Dxx-V3<br />
3V3<br />
DQ15<br />
DQ14<br />
DQ13<br />
DQ12<br />
DQ11<br />
DQ10<br />
DQ9<br />
DQ8<br />
DQ7<br />
DQ6<br />
DQ5<br />
DQ4<br />
DQ3<br />
DQ2<br />
DQ1<br />
DQ0<br />
BUSYFL<br />
D<br />
C<br />
B<br />
Settings<br />
AT49BV322AT<br />
AT49BV320AT<br />
Am29DL640D<br />
Am29LV320D<br />
TE28F320C3TC90<br />
TP16<br />
EBI_Clk<br />
R1 R2 R3<br />
X<br />
X X<br />
X<br />
X<br />
X X<br />
1<br />
R95<br />
X<br />
X<br />
X<br />
R113 0R_Jmpr<br />
3V3<br />
3V3<br />
C2<br />
10n<br />
R96<br />
10k<br />
R2<br />
0R_Jmpr<br />
C4<br />
100n<br />
GND<br />
R95<br />
0R_Jmpr<br />
prog_Flash<br />
RSTn<br />
connected to FPGA on<br />
DCS-ROB connector page 8<br />
LockFL<br />
IFcfgFL<br />
Shaded area shows<br />
devices not used for<br />
KIP/DCS<br />
C6<br />
10n<br />
C7<br />
100n<br />
A<br />
M29W320DT90N1<br />
MBM29DL164TD<br />
MBM29DL32xTE<br />
X<br />
X<br />
X<br />
X<br />
X<br />
X<br />
There are two types of Flash Eproms.<br />
Pins 9, 13, 14 and 15 are connected<br />
disparately. Especialy adress pins 19<br />
and 21 are exchanged.<br />
Company : KIP Uni-Heidelberg / Lindenstruth Editor : Dirk Gottschalk<br />
Title<br />
Expansion Bus Interface (EBI)<br />
Size Document Number Rev<br />
A4<br />
06 1.60<br />
A<br />
Date: 2004.11.23 16:30<br />
Sheet 6 of<br />
14<br />
5<br />
4<br />
3<br />
2<br />
1
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
D<br />
3V3<br />
3V3<br />
C182<br />
100n<br />
CON6<br />
C<br />
to TTCrx page 4<br />
SerBChan<br />
EVCntRes<br />
BrcstStr2<br />
BrcstStr1<br />
SubAd0<br />
SubAd1<br />
SubAd2<br />
SubAd3<br />
SubAd4<br />
SubAd5<br />
SubAd6<br />
SubAd7<br />
DbErr<br />
ClkL1Acc<br />
BCnt11<br />
BCnt10<br />
BCnt9<br />
BCnt8<br />
BCnt7<br />
BCnt6<br />
IO_B7<br />
IO_B6<br />
IO_B5<br />
IO_B4<br />
1<br />
3<br />
5<br />
7<br />
9<br />
11<br />
13<br />
15<br />
17<br />
19<br />
21<br />
23<br />
25<br />
27<br />
29<br />
31<br />
33<br />
35<br />
37<br />
39<br />
41<br />
43<br />
45<br />
47<br />
49<br />
51<br />
53<br />
55<br />
57<br />
59<br />
2<br />
4<br />
6<br />
8<br />
10<br />
12<br />
14<br />
16<br />
18<br />
20<br />
22<br />
24<br />
26<br />
28<br />
30<br />
32<br />
34<br />
36<br />
38<br />
40<br />
42<br />
44<br />
46<br />
48<br />
50<br />
52<br />
54<br />
56<br />
58<br />
60<br />
Brcst7<br />
Brcst6<br />
Brcst2<br />
Brcst5<br />
Brcst4<br />
Brcst3<br />
Brcst2<br />
SinErr<br />
EVCntLStr<br />
EVCntHStr<br />
BCntStrb<br />
DOutStr<br />
BCnt0<br />
BCnt1<br />
BCnt2<br />
BCnt3<br />
BCnt4<br />
Dout7<br />
Dout6<br />
IO_B0<br />
IO_B1<br />
IO_B2<br />
IO_B3<br />
to TTCrx page 4<br />
C<br />
Header_30x2<br />
GND_TPLL<br />
B<br />
RN12<br />
4x47R<br />
8<br />
7<br />
6<br />
5<br />
Shaded area shows<br />
devices not used for<br />
KIP/TRD<br />
IC1M<br />
INT_EXT_PIN<br />
<strong>EPXA1F484C3</strong><br />
B5<br />
B<br />
VregShdn 1<br />
VregShdn 2<br />
VregShdn 3<br />
VregShdn 4<br />
VregShdn 5<br />
VregShdn 6<br />
VregShdn 11<br />
VregShdn 12<br />
VregShdn 13<br />
VregShdn 14<br />
VregShdn 15<br />
VregShdn 16<br />
VregShdn 17<br />
VregShdn 18<br />
VregShdn 19<br />
VregShdn 20<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
VregShdn 21<br />
VregShdn 22<br />
VregShdn 23<br />
VregShdn 24<br />
RN13<br />
4x47R<br />
RN15<br />
4x47R<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
RN16<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
4x47R<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
RN17<br />
4x47R<br />
to DCS to ROB connector page 8<br />
ExtInt<br />
TP14<br />
1<br />
INT<br />
to DCS to ROB connector page 8<br />
A<br />
A<br />
Devices on this<br />
page are not used<br />
for KIP/DCS<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
Editor : Dirk Gottschalk<br />
Title<br />
DCS AUX Connector<br />
Size Document Number Rev<br />
A3<br />
07 1.60<br />
5<br />
4<br />
3<br />
2<br />
Date: 2004.11.23 16:55<br />
Sheet 7 of<br />
14<br />
1
4<br />
3<br />
2<br />
1<br />
IO-49<br />
IO-72<br />
L1Accept<br />
D<br />
IO_D1<br />
SRShClk<br />
IO-93<br />
SRMRn<br />
prog_Flash<br />
R10<br />
IO-50<br />
IO-73<br />
Y5<br />
T14<br />
Block 11 I/Os<br />
IO-108<br />
IO-94<br />
IO-109<br />
T12<br />
150R D<br />
TDI<br />
VCC2<br />
RN23<br />
2<br />
SRIO<br />
C A8<br />
IC20<br />
C<br />
B VregShdn 19<br />
E2<br />
RN7<br />
RN47<br />
to <strong>JTAG</strong> page 3<br />
UART<br />
B<br />
A A<br />
5<br />
4<br />
3<br />
2<br />
1<br />
5<br />
Clock1n<br />
to to Clock<br />
page 4<br />
page 4<br />
VregShdn 1<br />
VregShdn 2<br />
VregShdn 3<br />
VregShdn 4<br />
VregShdn 5<br />
VregShdn 6<br />
1<br />
1 2<br />
2 Clock1p<br />
Clock2n<br />
3<br />
3 4<br />
4 Clock2p<br />
5<br />
6<br />
5 6<br />
Trigger1n<br />
7<br />
8<br />
Trigger1p<br />
7 8<br />
Trigger2n<br />
9<br />
10<br />
Trigger2p<br />
9 10<br />
11<br />
12<br />
11 12<br />
ClkVar1n<br />
13<br />
13 14<br />
14<br />
ClkVar1p<br />
40MHz1n 15<br />
15 16<br />
16<br />
40MHz1p<br />
ExtInt<br />
17<br />
17 18<br />
18<br />
RxD<br />
19<br />
20<br />
TxD<br />
19 20<br />
21<br />
22<br />
Clock IO_A4<br />
21 22<br />
23<br />
IO_A2<br />
23 24<br />
24<br />
IO_A5 25<br />
26<br />
IO_A0<br />
25 26<br />
IO_A3<br />
27<br />
27 28<br />
28<br />
IO_A1<br />
IO_B7<br />
29<br />
30<br />
IO_B6<br />
IO_B5<br />
31<br />
29 30<br />
32<br />
IO_B4<br />
IO_B3<br />
3 6 33<br />
31 32<br />
34 3 6<br />
IO_B2<br />
IO_B1<br />
4 5 35<br />
33 34<br />
36 4 5<br />
IO_B0<br />
IO_D7<br />
1 8 37<br />
35 36<br />
38 1 8<br />
IO_D6<br />
IO_D5<br />
39<br />
40<br />
IO_D4<br />
37 38<br />
IO_D3<br />
41<br />
39 40<br />
42<br />
IO_D2<br />
IO_D1<br />
43<br />
41 42<br />
44<br />
IO_D0<br />
43 44<br />
45<br />
46<br />
LVDSup4n<br />
47<br />
45 46<br />
48<br />
LVDSup4p<br />
LVDSdown4n<br />
49<br />
50<br />
LVDSdown4p<br />
47 48<br />
LVDSup3n<br />
51<br />
49 50<br />
52<br />
LVDSup3p<br />
LVDSdown3n<br />
53<br />
51 52<br />
54<br />
LVDSdown3p<br />
55<br />
53 54<br />
56<br />
57<br />
55 56<br />
58<br />
59<br />
60<br />
57 58<br />
59 60<br />
61<br />
62<br />
LVDSup2n<br />
63<br />
61 62<br />
64<br />
LVDSup2p<br />
LVDSdown2n<br />
65<br />
63 64<br />
66<br />
LVDSdown2p<br />
LVDSup1n<br />
67<br />
65 66<br />
68<br />
LVDSup1p<br />
LVDSdown1n<br />
69<br />
70<br />
LVDSdown1p<br />
67 68<br />
69 70<br />
1<br />
VregShdn 8<br />
VregShdn 10<br />
VregShdn 11<br />
VregShdn 12<br />
VregShdn 13<br />
VregShdn 14<br />
VregShdn 15<br />
VregShdn 16<br />
VregShdn 17<br />
VregShdn 18<br />
VregShdn 19<br />
VregShdn 20<br />
VregShdn 21<br />
VregShdn 22<br />
VregShdn 23<br />
VregShdn 24<br />
2<br />
3<br />
1 2<br />
4 5<br />
3 4<br />
6<br />
5 6<br />
7<br />
8<br />
LVDSup5n<br />
9<br />
7 8<br />
10<br />
LVDSup5p<br />
9 10<br />
LVDSdown5n<br />
11<br />
12<br />
LVDSdown5p<br />
LVDSup6n<br />
13<br />
11 12<br />
14<br />
LVDSup6p<br />
LVDSdown6n<br />
15<br />
13 14<br />
16<br />
LVDSdown6p<br />
17<br />
15 16<br />
18<br />
19<br />
17 18<br />
20<br />
19 20<br />
21<br />
22<br />
21 22<br />
23<br />
24<br />
LVDSup7n<br />
25<br />
23 24<br />
26<br />
LVDSup7p<br />
LVDSdown7n<br />
27<br />
25 26<br />
28<br />
LVDSdown7p<br />
LVDSup8n<br />
29<br />
27 28<br />
30<br />
LVDSup8p<br />
LVDSdown8n<br />
31<br />
32<br />
LVDSdown8p<br />
29 30<br />
33<br />
31 32<br />
34<br />
35<br />
33 34<br />
36<br />
37<br />
35 36<br />
38<br />
37 38<br />
39<br />
39 40<br />
40<br />
R66 51R<br />
41<br />
42<br />
41 42<br />
1<br />
43<br />
44<br />
43 44<br />
2<br />
45<br />
46<br />
45 46<br />
3<br />
47<br />
48<br />
47 48<br />
4<br />
49<br />
50<br />
49 50<br />
51<br />
51 52<br />
52<br />
SCL<br />
53<br />
54<br />
53 54<br />
55<br />
55 56<br />
56 AAin8<br />
57<br />
57 58<br />
58<br />
AAin2<br />
59<br />
60<br />
59 60<br />
61<br />
62<br />
61 62<br />
63<br />
64<br />
63 64<br />
65<br />
66<br />
65 66<br />
67<br />
68<br />
67 68<br />
69<br />
70<br />
69 70<br />
LVDSup3n<br />
LVDSup1n<br />
LVDSup1p<br />
LVDSup2n<br />
LVDSup2p<br />
LVDSdown1p<br />
LVDSdown1n<br />
LVDSdown2p<br />
LVDSdown2n<br />
AB8<br />
AB6<br />
AA8<br />
AA7<br />
AB15<br />
VregShdn 8<br />
VregShdn 9<br />
VregShdn 10<br />
aux5<br />
TCK<br />
aux2<br />
aux1<br />
IO_B6<br />
IO_B7<br />
IO_B5<br />
AB10<br />
AA10<br />
AB9<br />
AA9<br />
IO_B1<br />
IO_B0<br />
IO_D3<br />
IO_D4<br />
IO_D2<br />
IO_B2<br />
aux5<br />
AUX4<br />
AA15<br />
AA17<br />
AA16<br />
AA14<br />
AB14<br />
LVDSdown5p<br />
LVDSdown5n<br />
LVDSdown7p<br />
LVDSdown7n<br />
LVDSdown6p<br />
LVDSdown6n<br />
LVDSdown8p<br />
LVDSdown8n<br />
LVDSup5n<br />
LVDSup7n<br />
LVDSup8n<br />
Y2<br />
Y3<br />
AA3<br />
AA4<br />
AA9<br />
AB10<br />
AA10<br />
AB9<br />
SRMRn<br />
SRShClk<br />
SROEn<br />
SRStr<br />
SRDin<br />
IO_D5<br />
IO_D7<br />
IO_B3<br />
IO_D6<br />
IO_D0<br />
AB4<br />
AUX3<br />
aux2<br />
SRDin<br />
SRShClk<br />
SROEn<br />
SRIO<br />
SRDin<br />
aux1<br />
SRIO<br />
LVDSdown3n<br />
LVDSdown4n<br />
LVDSup4n<br />
VregShdn 2<br />
VregShdn 4<br />
IO_B4<br />
aux4<br />
LVDSup6n<br />
AB17<br />
aux3<br />
TCK<br />
VregShdn 1<br />
VregShdn 2<br />
VregShdn 3<br />
VregShdn 4<br />
TD_FC<br />
VregShdn 5<br />
VregShdn 6<br />
VregShdn 7<br />
connected to<br />
<strong>JTAG</strong> page 3<br />
1V8<br />
VregShdn 11<br />
VregShdn 12<br />
VregShdn 13<br />
VregShdn 14<br />
VregShdn 15<br />
VregShdn 16<br />
VregShdn 17<br />
VregShdn 18<br />
1V8<br />
3V3<br />
3V3 1V8<br />
3V3<br />
3V3<br />
3V3<br />
AUX3<br />
SRStr<br />
AUX4<br />
3V3<br />
3V3<br />
SROEn<br />
3V3<br />
MVCC<br />
VregShdn 7<br />
VregShdn 9<br />
MRSTn<br />
connected to<br />
Flash page 6<br />
IRQFL<br />
IO_B6<br />
IO_B7<br />
IO_B5<br />
IFcfgFL<br />
LockFL<br />
IO_B3<br />
IO_B4<br />
TD_CE<br />
VregShdn 20<br />
VregShdn 21<br />
VregShdn 22<br />
VregShdn 23<br />
VregShdn 24<br />
TMS<br />
IO_B1<br />
IO_B0<br />
TTC_DQ3<br />
BCntRes<br />
TTC_DQ2<br />
TTC_DQ1<br />
TTC_DQ0<br />
IO_B2<br />
BUSYFL<br />
connected<br />
to TTCrx on<br />
page 4<br />
3V3<br />
CRSTO<br />
CRSTI<br />
GND<br />
IO_C7<br />
IO_C5<br />
IO_C3<br />
IO_C1<br />
AAin7<br />
AAin1<br />
IO_C6<br />
IO_C4<br />
IO_C2<br />
IO_C0<br />
all VregShdn pins connected on AUX connector<br />
page 7. May be configured as PCI pins.<br />
to Clock page 4<br />
RN18 may connect<br />
VRegShdn pins 7 to 10<br />
directly to FPGA if the CPLD<br />
is not populated.<br />
GND_PW<br />
SDA<br />
to AUX connector page 7<br />
to AUX connector page 7<br />
to Clock page 4<br />
connected to<br />
<strong>JTAG</strong> page 3<br />
to AUX connector page 7<br />
R57 0R_Jmpr<br />
W11<br />
T11<br />
AB10<br />
V10<br />
AA10<br />
W10<br />
Y10<br />
U10<br />
AB9<br />
T10<br />
AA9<br />
Y9<br />
W9<br />
AB8<br />
V9<br />
AA8<br />
AB6<br />
U9<br />
Y8<br />
AA7<br />
W8<br />
AB5<br />
IO-39<br />
IO-40<br />
IO-41<br />
IO-42<br />
IO-43<br />
IO-44<br />
IO-45<br />
IO-46<br />
IO-47<br />
IO-48<br />
IO-51<br />
IO-52<br />
IO-53<br />
IO-54<br />
IO-55<br />
IO-56<br />
IO-57<br />
IO-58<br />
IO-59<br />
IO-60<br />
IO-61<br />
IC1I<br />
<strong>EPXA1F484C3</strong><br />
Block 10 I/Os<br />
SerBChan<br />
R134<br />
10k<br />
to <strong>JTAG</strong> page 3<br />
Title<br />
C184<br />
100n<br />
GND_PW* -> Do not connect these GND<br />
nets directly to the plane but route via<br />
the voltage regulators and main supply<br />
decoupling capacitors !<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
DCS DIMM and LVDS port<br />
Shaded area shows<br />
devices not used for<br />
TRD/DCS<br />
2<br />
3<br />
4<br />
7<br />
6<br />
5<br />
RN46<br />
4x47R<br />
IO-62<br />
IO-63<br />
IO-64<br />
IO-65<br />
IO-66<br />
IO-67<br />
IO-68<br />
IO-69<br />
IO-70<br />
IO-71<br />
IO-74<br />
IO-75<br />
IO-76<br />
IO-77<br />
IO-78<br />
IO-79<br />
IO-80<br />
IO-81<br />
IO-82<br />
IO-83<br />
V8<br />
AA6<br />
AA5<br />
V7<br />
Y7<br />
W7<br />
Y6<br />
V5<br />
V4<br />
V6<br />
W5<br />
U6<br />
Y4<br />
U7<br />
AA4<br />
AB4<br />
U8<br />
AA3<br />
T9<br />
Y3<br />
Y2<br />
9<br />
10<br />
11<br />
12<br />
13<br />
14<br />
15<br />
16<br />
OutDn<br />
OutDp<br />
OutCn<br />
OutCp<br />
OutBn<br />
OutBp<br />
OutAn<br />
OutAp<br />
EN34<br />
8<br />
InD 7<br />
InC 6<br />
GND 5<br />
VCC 4<br />
InB 3<br />
InA 2<br />
EN12<br />
1<br />
2<br />
1<br />
IC18<br />
SN75LVDS391PW<br />
IC19<br />
C153<br />
100n<br />
RN24<br />
R166 0R_Jmpr<br />
CON14<br />
Editor : Dirk Gottschalk<br />
Size Document Number Rev<br />
A3<br />
8 1.60<br />
LED8<br />
green_0603<br />
1<br />
RN22 4x0R_Jmpr<br />
5<br />
6<br />
7<br />
8<br />
RN26 4x0R_Jmpr<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
5<br />
6<br />
7<br />
8<br />
In1p<br />
In1n<br />
In2p<br />
In2n<br />
In3p<br />
In3n<br />
In4p<br />
In4n<br />
5<br />
6<br />
7<br />
8<br />
4<br />
3<br />
2<br />
1<br />
SN75LVDT390PW<br />
4<br />
3<br />
2<br />
1<br />
4x0R_Jmpr<br />
OutDn EN34<br />
OutDp<br />
OutCn<br />
OutCp<br />
OutBn<br />
OutBp<br />
OutAn<br />
OutAp EN12<br />
4<br />
3<br />
2<br />
1<br />
EN12<br />
16<br />
Out1<br />
15<br />
Out2<br />
14<br />
VCC 13<br />
GND 12<br />
Out3<br />
11<br />
Out4<br />
10<br />
EN34<br />
9<br />
C87<br />
100n<br />
R78 0R_Jmpr<br />
UDCD<br />
TP12<br />
C150<br />
10n<br />
C157<br />
8<br />
7<br />
6<br />
5<br />
RN3<br />
4x47R<br />
IC17<br />
100n<br />
R138<br />
10k<br />
1<br />
2<br />
3<br />
4<br />
9<br />
10<br />
11<br />
12<br />
13<br />
14<br />
15<br />
16<br />
SN75LVDS391PW<br />
8<br />
7<br />
6<br />
5<br />
8<br />
InD 7<br />
InC 6<br />
5<br />
GND 5<br />
VCC 4<br />
3<br />
InB 3<br />
2<br />
InA 2<br />
1<br />
<strong>EPXA1F484C3</strong><br />
IC1G<br />
UART-CTSn<br />
F1<br />
UART-DSRn<br />
G4<br />
UART-RxD F2<br />
UART-DCDn<br />
F6<br />
UART-RIn<br />
F3<br />
UART-TxD G5<br />
UART-RTSn<br />
UART-DTRn<br />
E6<br />
R74<br />
51R<br />
RN43<br />
1<br />
4x0R_Jmpr<br />
RN45 4x0R_Jmpr<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
URI<br />
TP26<br />
R137<br />
150R<br />
CON1<br />
1 2<br />
3 4<br />
5 6<br />
Header_03x2<br />
C151<br />
100n<br />
CON13<br />
R4 0R_Jmpr<br />
C154<br />
10n<br />
1<br />
2<br />
8<br />
7<br />
RN28<br />
4x47R<br />
RN27<br />
Y16<br />
W16<br />
AA17<br />
T15<br />
AB17<br />
U15<br />
V15<br />
AA16<br />
W15<br />
Y15<br />
AB16<br />
U14<br />
AA15<br />
V14<br />
IO-84<br />
IO-85<br />
IO-86<br />
IO-87<br />
IO-88<br />
IO-89<br />
IO-90<br />
IO-91<br />
IO-92<br />
IO-95<br />
IO-96<br />
IO-97<br />
IO-98<br />
IC1J<br />
<strong>EPXA1F484C3</strong><br />
IO-99<br />
IO-100<br />
IO-101<br />
IO-102<br />
IO-103<br />
IO-104<br />
IO-105<br />
IO-106<br />
IO-107<br />
IO-110<br />
IO-111<br />
IO-112<br />
IO-113<br />
Y14<br />
R13<br />
W14<br />
T13<br />
AB15<br />
AA14<br />
U13<br />
Y13<br />
V13<br />
W13<br />
AB14<br />
AA12<br />
U12<br />
Y12<br />
R139<br />
10k<br />
R164 10k<br />
R165 10k<br />
5<br />
6<br />
7<br />
8<br />
4<br />
3<br />
2<br />
1<br />
4<br />
3<br />
2<br />
1<br />
RN25<br />
4x0R_Jmpr<br />
5<br />
6<br />
7<br />
8<br />
5<br />
6<br />
7<br />
8<br />
4x0R_Jmpr<br />
4<br />
3<br />
2<br />
1<br />
1<br />
10<br />
11<br />
12<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
9<br />
A10<br />
A11<br />
GND_B0<br />
VCCO_B0<br />
B15<br />
B12<br />
B10<br />
B8<br />
TCK<br />
VCC1<br />
36<br />
TDO 35<br />
D8<br />
34<br />
D10<br />
33<br />
D12<br />
32<br />
D15<br />
31<br />
VCCO_B1<br />
30<br />
GND_B1<br />
29<br />
C11<br />
28<br />
C10<br />
27<br />
C8<br />
26<br />
TMS 25<br />
4x0R_Jmpr<br />
4x47R<br />
C155<br />
100n<br />
R163 10k<br />
2<br />
3<br />
4<br />
7<br />
6<br />
5<br />
13<br />
14<br />
15<br />
16<br />
17<br />
18<br />
19<br />
20<br />
21<br />
22<br />
23<br />
24<br />
GND1<br />
B6<br />
B4<br />
B2<br />
B0<br />
CLK1_in<br />
CLK2_in<br />
C0<br />
C1<br />
C2<br />
C4<br />
C6<br />
A6<br />
A4<br />
A2<br />
A1<br />
A0_GOE0<br />
CLK0_in<br />
CLK3_in<br />
D0_GOE1<br />
D2<br />
D4<br />
D6<br />
GND3<br />
48<br />
47<br />
46<br />
45<br />
44<br />
43<br />
42<br />
41<br />
40<br />
39<br />
38<br />
37<br />
IC14<br />
LC4064ZC-75T48<br />
RN2<br />
4x47R<br />
R162 10k<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
2<br />
C185<br />
100n<br />
1<br />
IC1F<br />
FAST1<br />
FAST2<br />
FAST3<br />
FAST4<br />
J2<br />
K5<br />
V11<br />
W12<br />
R6 0R_Jmpr<br />
LED9<br />
red_0603<br />
R131<br />
10k<br />
C178<br />
10n<br />
R84<br />
Dedicated Fast Inputs<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
<strong>EPXA1F484C3</strong><br />
RN44<br />
4x0R_Jmpr<br />
2<br />
1<br />
LED7<br />
green_0603<br />
R85 150R<br />
C223<br />
100n<br />
C5<br />
C152<br />
10n<br />
1<br />
2<br />
8<br />
7<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
In1p<br />
In1n<br />
In2p<br />
In2n<br />
In3p<br />
In3n<br />
In4p<br />
In4n<br />
SN75LVDT390PW<br />
EN12<br />
16<br />
Out1<br />
15<br />
Out2<br />
14<br />
VCC 13<br />
GND 12<br />
Out3<br />
11<br />
Out4<br />
10<br />
EN34<br />
9<br />
4x47R<br />
10n<br />
RN18 4x0R_Jmpr<br />
1<br />
2<br />
3<br />
4<br />
8<br />
7<br />
6<br />
5<br />
C156<br />
100n<br />
Date: 2005.02.14 12:00<br />
Sheet 8 of<br />
14
5<br />
4<br />
3<br />
2<br />
1<br />
R144<br />
51R<br />
C237<br />
47n<br />
CON2<br />
3V3<br />
D<br />
C<br />
B<br />
GND<br />
T18<br />
U18<br />
U19<br />
U20<br />
U21<br />
V16<br />
V17<br />
V18<br />
V19<br />
V20<br />
W17<br />
W18<br />
R89<br />
10k<br />
place resistors RN9..11 near output pins<br />
IO-118 IO-128<br />
AB19<br />
IC1K<br />
IO-124 IO-130<br />
AA20<br />
IO-119 IO-133<br />
AA19<br />
IO-117<br />
IO-123<br />
Y21<br />
Y20<br />
IO-116 IO-127<br />
Y19<br />
IO-115 IO-134<br />
IO-121 IO-136<br />
Y18<br />
IO-126<br />
IO-129<br />
Y17<br />
IO-132 IO-114<br />
W22<br />
IO-122 IO-120<br />
W21<br />
IO-131 IO-125<br />
W20<br />
IO-135<br />
Block 12 I/Os<br />
<strong>EPXA1F484C3</strong><br />
ERst<br />
3V3<br />
MDintn<br />
1<br />
2<br />
3<br />
4<br />
RN9<br />
RN10<br />
1<br />
2<br />
3<br />
4<br />
3V3<br />
1<br />
2<br />
3<br />
4<br />
C166<br />
100n<br />
8<br />
7<br />
6<br />
5<br />
4x22R<br />
4x22R<br />
8<br />
7<br />
6<br />
5<br />
RN11<br />
4x22R<br />
8<br />
7<br />
6<br />
5<br />
R103<br />
3k3<br />
C164<br />
10n<br />
keep signals short!<br />
PwrDown<br />
TP15<br />
1<br />
R118<br />
2k2<br />
49<br />
Rx_DV<br />
50<br />
GND8<br />
51<br />
VCCD<br />
52<br />
Rx_Clk<br />
53<br />
Rx_ER<br />
54<br />
Tx_ER<br />
55<br />
Tx_Clk<br />
56<br />
Tx_EN<br />
57<br />
TxD0<br />
58<br />
TxD1<br />
59<br />
TxD2<br />
60<br />
TxD3<br />
61<br />
GND9<br />
62<br />
COL<br />
63<br />
CRS<br />
64<br />
MDint<br />
48<br />
47<br />
46<br />
45<br />
44<br />
RxD0<br />
RxD1<br />
RxD2<br />
RxD3<br />
NC3<br />
red_0603<br />
red_0603<br />
1 2<br />
LED3<br />
RN8<br />
4x330R<br />
MDC 43<br />
MDIO 42<br />
GND7<br />
41<br />
IC9<br />
<strong>LXT971ALC</strong><br />
0R_Jmpr<br />
R47<br />
0R_Jmpr<br />
1 2<br />
LED4<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
red_0603<br />
1<br />
2<br />
40<br />
39<br />
38<br />
37<br />
36<br />
35<br />
34<br />
33<br />
VCCIO2<br />
PwrDwn<br />
LED_Cfg1<br />
LED_Cfg2<br />
LED_Cfg3<br />
GND6<br />
GND5<br />
Pause<br />
RefClk_XI<br />
XO<br />
MDDIS<br />
RST<br />
TxSlew0<br />
TxSlew1<br />
GND1<br />
VCCIO1<br />
NC1<br />
NC2<br />
GND2<br />
ADDR0<br />
ADDR1<br />
ADDR2<br />
ADDR3<br />
ADDR4<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
9<br />
10<br />
11<br />
12<br />
13<br />
14<br />
15<br />
16<br />
LED5<br />
E_Pause<br />
R45<br />
R46<br />
0R_Jmpr<br />
Sleep<br />
32<br />
TRST<br />
31<br />
E_TCK<br />
TCK 30<br />
E_TMS<br />
TMS 29<br />
E_TDO<br />
TDO 28<br />
E_TDI<br />
TDI<br />
27<br />
SD/TP 26<br />
GND4<br />
25<br />
TPFIN 24<br />
TPFIP 23<br />
22<br />
VCCA2<br />
VCCA1<br />
21<br />
TPFON 20<br />
TPFOP 19<br />
GND3<br />
18<br />
RBIAS 17<br />
R48<br />
0R_Jmpr<br />
Jumper R45...48<br />
will set slew rate.<br />
ETCK<br />
TP17<br />
1<br />
R49<br />
22k1_1%<br />
C167<br />
10n<br />
1<br />
3V3<br />
ETMS<br />
TP18<br />
keep signal short!<br />
C168<br />
100n<br />
ETDO<br />
TP19<br />
1<br />
ETDI<br />
TP20<br />
1<br />
TPFIN<br />
TPFIP<br />
C158<br />
10n<br />
3V3<br />
3V3<br />
R80<br />
51R<br />
C160<br />
100n<br />
R86<br />
51R<br />
C170<br />
C169<br />
TPFON<br />
TPFOP<br />
R42<br />
51R<br />
270p<br />
270p<br />
R40<br />
8R06<br />
R41<br />
8R06<br />
R44<br />
0R_Jmpr<br />
3V3<br />
C232<br />
C233<br />
R43<br />
51R<br />
33p<br />
33p<br />
C247<br />
22uF<br />
R145<br />
51R<br />
C172<br />
10n<br />
C171<br />
10n<br />
C248<br />
100n<br />
R146<br />
1R5<br />
C177<br />
C236<br />
47n<br />
R51<br />
0R_Jmpr<br />
R50<br />
0R_Jmpr<br />
TR1<br />
Halo TG110-S050N2<br />
16<br />
15<br />
14<br />
13<br />
12<br />
11<br />
10<br />
9<br />
not used<br />
1<br />
PwUp VOCM 10<br />
2<br />
RGP1 VPOS 9<br />
3<br />
InHi OutHi<br />
8<br />
4<br />
InLo OutLo<br />
7<br />
5<br />
RGP2 GND 6<br />
R52<br />
R59<br />
IC22<br />
AD8351ARM<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
0R_Jmpr<br />
R53<br />
0R_Jmpr<br />
0R_Jmpr<br />
Rx-<br />
R54<br />
100R<br />
Rx+<br />
D7<br />
D10<br />
D8<br />
D9<br />
C174<br />
SMAJ5.0CA<br />
1n/2kV<br />
SMAJ5.0CA<br />
SMAJ5.0CA<br />
SMAJ5.0CA<br />
Tx-<br />
Tx+<br />
C173<br />
1n/2kV<br />
R142<br />
374R<br />
C249<br />
R143<br />
100n<br />
590R<br />
C245<br />
C246<br />
33p<br />
33p<br />
R140<br />
100R<br />
Tx-<br />
Tx+<br />
Rx+<br />
Rx-<br />
TPFON<br />
TPFOP<br />
TPFIN<br />
TPFIP<br />
CON7<br />
1 2<br />
3 4<br />
5 6<br />
Header_03x2<br />
1 2<br />
3 4<br />
5 6<br />
7 8<br />
9 10<br />
Header_05x2<br />
R148<br />
R149<br />
51R<br />
51R<br />
<strong>Ethernet</strong> Connector<br />
D<br />
C<br />
B<br />
place jumper<br />
close to crystal.<br />
3V3<br />
C181<br />
100n<br />
EClkExt<br />
R58<br />
0R_Jmpr<br />
XTAL1<br />
1 2<br />
25MHz<br />
C175<br />
18p<br />
C176<br />
18p<br />
C161<br />
10n<br />
C162<br />
100n<br />
GND_ETH<br />
Shaded area shows<br />
devices not used for<br />
KIP/TRD<br />
Slewrate Table<br />
R45 R46 R47 R48<br />
A<br />
3,0ns<br />
3,4ns<br />
3,9ns<br />
4,4ns<br />
X<br />
X<br />
X<br />
X<br />
X<br />
X<br />
X<br />
X<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
Title<br />
Block 09 I/Os <strong>Ethernet</strong><br />
Editor : Dirk Gottschalk<br />
A<br />
Size Document Number Rev<br />
A3<br />
9 1.63<br />
5<br />
4<br />
3<br />
2<br />
Date: 2005.12.21 12:35<br />
Sheet 09 of<br />
14<br />
1
5<br />
4<br />
3<br />
2<br />
1<br />
shield signals AAin1 .. 4 with GND traces<br />
Place jumper R10 near to<br />
crystal. Keep trace short.<br />
AAin7<br />
D<br />
C<br />
1<br />
2<br />
3<br />
4<br />
RN39<br />
4x10k<br />
8<br />
7<br />
6<br />
5<br />
Header_08x2x2mm<br />
CON11<br />
1 2<br />
3 4<br />
5 6<br />
7 8<br />
9 10<br />
1112<br />
1314<br />
1516<br />
RN40<br />
4x10k<br />
AAin8<br />
AAin1<br />
AAin2<br />
To ROB connector page 8<br />
keep all analog signals as short as possible<br />
8<br />
7<br />
6<br />
5<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
4x10k<br />
RN35<br />
RN36<br />
5<br />
6<br />
7<br />
8<br />
4<br />
3<br />
2<br />
1<br />
4x10k<br />
4<br />
3<br />
2<br />
1<br />
C194<br />
10n<br />
C210<br />
10n<br />
C196<br />
10n<br />
C211<br />
10n<br />
C208<br />
10n<br />
C212<br />
10n<br />
C209<br />
10n<br />
C213<br />
10n<br />
R127<br />
10k<br />
Populate R122 if<br />
AIN8 should measure<br />
voltage regulator<br />
temperature.<br />
C214<br />
100n<br />
C215<br />
2uF2<br />
C68<br />
100n<br />
ADMCLK<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
9<br />
10<br />
11<br />
12<br />
13<br />
14<br />
VregTemp<br />
IC13<br />
AIN7<br />
AIN8<br />
AVDD<br />
AGND1<br />
RefIn1n<br />
RefIn1p<br />
AIN1<br />
AIN2<br />
AIN3<br />
AIN4<br />
AIN5<br />
AINCOM<br />
RefIn2p<br />
RefIn2n<br />
AD7708BRU<br />
R10<br />
C206<br />
33p<br />
0R_Jmpr<br />
XTALin<br />
28<br />
XTALout<br />
27<br />
DVDD 26<br />
DGND 25<br />
DIN 24<br />
DOUT<br />
23<br />
RDY 22<br />
CS 21<br />
SCLK 20<br />
RST<br />
19<br />
P1<br />
18<br />
AGND2<br />
17<br />
P2<br />
16<br />
AIN6<br />
15<br />
3<br />
4<br />
XTAL2<br />
32kHz<br />
2<br />
1<br />
Keep this<br />
signals short!<br />
C207<br />
33p<br />
RN33<br />
5<br />
6<br />
7<br />
8<br />
5<br />
6<br />
7<br />
8<br />
RN34<br />
C189<br />
10n<br />
4x47R<br />
4<br />
3<br />
2<br />
1<br />
4<br />
3<br />
2<br />
1<br />
4x47R<br />
C192<br />
100n<br />
C193<br />
470n<br />
3V3<br />
GND_<strong>ADC</strong><br />
ADin<br />
ADout<br />
ARdyn<br />
ACSn<br />
ASclk<br />
ARstn<br />
AP1<br />
AP2<br />
C195<br />
10uF<br />
D<br />
C<br />
B<br />
1<br />
2<br />
3<br />
4<br />
RN41<br />
4x10k<br />
8<br />
7<br />
6<br />
5<br />
RN37<br />
5<br />
6<br />
7<br />
8<br />
4x10k<br />
4<br />
3<br />
2<br />
1<br />
C216<br />
10n<br />
C217<br />
10n<br />
C218<br />
10n<br />
Keep this<br />
line short!<br />
B<br />
1<br />
2<br />
IC21<br />
Vout<br />
Vin<br />
GND<br />
3<br />
C197<br />
C199<br />
C200<br />
R94<br />
C204<br />
10R<br />
C201<br />
3V3<br />
C202<br />
3V3<br />
Populate R158 if AIN7<br />
should measure<br />
system temperature.<br />
R158<br />
0R_Jmpr<br />
R156<br />
10k<br />
1<br />
2<br />
LED11<br />
green_0603<br />
C132<br />
100n<br />
AD1582ART<br />
GND_<strong>ADC</strong><br />
10n<br />
100n<br />
470n<br />
10uF<br />
C241<br />
10n<br />
R93<br />
10R<br />
100n<br />
470n<br />
GND_<strong>ADC</strong><br />
A<br />
Current source for additional<br />
temperature sensor.<br />
CON12<br />
2<br />
2<br />
1<br />
1<br />
Temp2<br />
Q2<br />
BC859C<br />
3 2<br />
1<br />
C135<br />
100n<br />
R157<br />
1k<br />
Please connect these analog ground to one point<br />
near voltage reference ! Do only connect to GND<br />
plane here with multiple vias!<br />
Shaded area shows<br />
devices not used for<br />
KIP/DCS<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
Editor : Dirk Gottschalk<br />
Title<br />
DCS <strong>ADC</strong><br />
Size Document Number Rev<br />
A4<br />
10 1.63<br />
Date: 2004.11.16 12:30<br />
Sheet 10 of<br />
14<br />
A<br />
5<br />
4<br />
3<br />
2<br />
1
5<br />
5<br />
4<br />
4<br />
3<br />
3<br />
2<br />
2<br />
1<br />
1<br />
D<br />
D<br />
C<br />
C<br />
B<br />
B<br />
A<br />
A<br />
VCC_PLLF<br />
VCC_CLKF<br />
GND_PLLF<br />
1V8<br />
3V3<br />
3V3<br />
1V8<br />
3V3<br />
1V8<br />
3V3<br />
GND<br />
GND_PLLF<br />
Title<br />
Size Document Number Rev<br />
Date: Sheet of<br />
11 1.60<br />
FPGA Power Connections<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
A3<br />
11 14<br />
Title<br />
Size Document Number Rev<br />
Date: Sheet of<br />
11 1.60<br />
FPGA Power Connections<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
A3<br />
11 14<br />
Title<br />
Size Document Number Rev<br />
Date: Sheet of<br />
11 1.60<br />
FPGA Power Connections<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
A3<br />
11 14<br />
Editor : Dirk Gottschalk<br />
PLL Supply<br />
FPGA Clock Supply<br />
2003.12.19 14:30<br />
Shaded area shows<br />
devices not used for<br />
KIP/DCS<br />
Keep this traces as short as<br />
possible short!<br />
C47<br />
100n<br />
C47<br />
100n<br />
C64<br />
10uF<br />
C64<br />
10uF<br />
CF2<br />
1n<br />
CF2<br />
1n<br />
C43<br />
10n<br />
C43<br />
10n<br />
C22<br />
10n<br />
C22<br />
10n<br />
C60<br />
2uF2<br />
C60<br />
2uF2<br />
C39<br />
1n<br />
C39<br />
1n<br />
C18<br />
1n<br />
C18<br />
1n<br />
C72<br />
100n<br />
C72<br />
100n<br />
C115<br />
100n<br />
C115<br />
100n<br />
C35<br />
100n<br />
C35<br />
100n<br />
C107<br />
100n<br />
C107<br />
100n<br />
C52<br />
10n<br />
C52<br />
10n<br />
C67<br />
10uF<br />
C67<br />
10uF<br />
C31<br />
10n<br />
C31<br />
10n<br />
CF6<br />
1n<br />
CF6<br />
1n<br />
C48<br />
1n<br />
C48<br />
1n<br />
C27<br />
1n<br />
C27<br />
1n<br />
CF3<br />
1n<br />
CF3<br />
1n<br />
C23<br />
100n<br />
C23<br />
100n<br />
C61<br />
100n<br />
C61<br />
100n<br />
C40<br />
10n<br />
C40<br />
10n<br />
C73<br />
2uF2<br />
C73<br />
2uF2<br />
C19<br />
10n<br />
C19<br />
10n<br />
C57<br />
1n<br />
C57<br />
1n<br />
C36<br />
1n<br />
C36<br />
1n<br />
C1<br />
1n<br />
C1<br />
1n<br />
C65<br />
10uF<br />
C65<br />
10uF<br />
C108<br />
100n<br />
C108<br />
100n<br />
C53<br />
100n<br />
C53<br />
100n<br />
C49<br />
10n<br />
C49<br />
10n<br />
C63<br />
10uF<br />
C63<br />
10uF<br />
CF4<br />
1n<br />
CF4<br />
1n<br />
C28<br />
10n<br />
C28<br />
10n<br />
C45<br />
1n<br />
C45<br />
1n<br />
C24<br />
1n<br />
C24<br />
1n<br />
C41<br />
100n<br />
C41<br />
100n<br />
C74<br />
470n<br />
C74<br />
470n<br />
VCCint01<br />
H12<br />
VCCint02<br />
H15<br />
VCCint03<br />
H8<br />
VCCint04<br />
J11<br />
VCCint05<br />
J13<br />
VCCint06<br />
J9<br />
VCCint07<br />
K10<br />
VCCint08<br />
K12<br />
VCCint09<br />
K14<br />
VCCint10<br />
L11<br />
VCCint11<br />
L13<br />
VCCint12<br />
L9<br />
VCCint13<br />
M10<br />
VCCint14<br />
M12<br />
VCCint15<br />
M14<br />
VCCint16<br />
N11<br />
VCCint17<br />
N13<br />
VCCint18<br />
N9<br />
VCCint19<br />
P10<br />
VCCint20<br />
P12<br />
VCCint21<br />
P14<br />
VCCint22<br />
P8<br />
VCCint23<br />
R15<br />
VCCint24<br />
R9<br />
VCCIO2-01<br />
A14<br />
VCCIO2-02<br />
A18<br />
VCCIO2-03<br />
A20<br />
VCCIO2-04<br />
C18<br />
VCCIO2-05<br />
C22<br />
VCCIO2-06<br />
D12<br />
VCCIO2-07<br />
D15<br />
VCCIO2-08<br />
E14<br />
VCCIO2-09<br />
E19<br />
VCCIO2-10<br />
F15<br />
VCCIO2-11<br />
F22<br />
VCCIO2-12<br />
G12<br />
VCCIO2-13<br />
G17<br />
VCCIO2-14<br />
G19<br />
VCCIO2-15<br />
H13<br />
VCCIO2-16<br />
H14<br />
VCCIO2-17<br />
H21<br />
VCCIO2-18<br />
J15<br />
VCCIO2-19<br />
J18<br />
VCCIO2-20<br />
J22<br />
VCCIO3-01<br />
K1<br />
VCCIO3-02<br />
L8<br />
VCCIO6-01<br />
A13<br />
VCCIO6-02<br />
A3<br />
VCCIO6-03<br />
C1<br />
VCCIO6-04<br />
F7<br />
VCCIO7-01<br />
G1<br />
VCCIO7-02<br />
J7<br />
VCCIO9-01<br />
M1<br />
VCCIO9-02<br />
M8<br />
VCCIO9-03<br />
T1<br />
VCCIO10-01<br />
AB11<br />
VCCIO10-02<br />
AB3<br />
VCCIO10-03<br />
AB7<br />
VCCIO10-04<br />
R11<br />
VCCIO10-05<br />
U5<br />
VCCIO10-06<br />
Y1<br />
VCCIO11-01<br />
AB13<br />
VCCIO11-02<br />
AB18<br />
VCCIO11-03<br />
R12<br />
VCCIO12-01<br />
AB20<br />
VCCIO12-02<br />
T16<br />
VCCIO12-03<br />
V22<br />
VCCIO13-01<br />
K22<br />
VCCIO13-02<br />
M15<br />
VCCIO13-03<br />
T22<br />
VCC-CLK2<br />
R18<br />
VCC-CLK4<br />
N17<br />
VCC-CLK5<br />
E5<br />
VCC-CLK6<br />
E4<br />
VCC-CKout2<br />
T19<br />
GND-CLK42<br />
N18<br />
GND-CLK51<br />
D6<br />
GND-CLK52<br />
D5<br />
GND-CLK61<br />
F5<br />
GND-CKout2<br />
T17<br />
GND-CLK41<br />
N19<br />
GND-CLK22<br />
R19<br />
GND-CLK21<br />
R17<br />
GND-CLK62<br />
F4<br />
GND-01<br />
J3<br />
GND-02<br />
A1<br />
GND-03<br />
A11<br />
GND-04<br />
A16<br />
GND-05<br />
A2<br />
GND-06<br />
A21<br />
GND-07<br />
A22<br />
GND-08<br />
AA1<br />
GND-09<br />
AA11<br />
GND-10<br />
AA13<br />
GND-11<br />
AA18<br />
GND-12<br />
AA2<br />
GND-13<br />
AA21<br />
GND-14<br />
AA22<br />
GND-15<br />
AB1<br />
GND-16<br />
AB2<br />
GND-17<br />
AB21<br />
GND-18<br />
AB22<br />
GND-19<br />
B1<br />
GND-20<br />
B14<br />
GND-21<br />
B2<br />
GND-22<br />
B21<br />
GND-23<br />
B22<br />
GND-24<br />
C12<br />
GND-25<br />
C16<br />
GND-26<br />
C6<br />
GND-27<br />
D20<br />
GND-28<br />
D4<br />
GND-29<br />
E1<br />
GND-30<br />
E17<br />
GND-31<br />
E3<br />
GND-32<br />
F21<br />
GND-33<br />
G14<br />
GND-34<br />
H11<br />
GND-35<br />
H16<br />
GND-36<br />
J10<br />
GND-37<br />
J12<br />
GND-38<br />
J14<br />
GND-39<br />
J19<br />
GND-40<br />
J21<br />
GND-41<br />
J8<br />
GND-42<br />
K11<br />
GND-43<br />
K13<br />
GND-44<br />
K16<br />
GND-45<br />
K2<br />
GND-46<br />
K8<br />
GND-47<br />
K9<br />
GND-48<br />
L10<br />
GND-49<br />
L12<br />
GND-50<br />
L14<br />
GND-51<br />
M11<br />
GND-52<br />
M13<br />
GND-53<br />
M2<br />
GND-54<br />
M9<br />
GND-55<br />
N10<br />
GND-56<br />
N12<br />
GND-57<br />
N14<br />
GND-58<br />
N15<br />
GND-59<br />
N8<br />
GND-60<br />
P11<br />
GND-61<br />
P13<br />
GND-62<br />
P15<br />
GND-63<br />
P9<br />
GND-64<br />
R14<br />
GND-65<br />
R8<br />
GND-66<br />
T2<br />
GND-67<br />
T21<br />
GND-68<br />
V21<br />
GND-69<br />
W19<br />
GND-70<br />
W4<br />
GND-71<br />
W6<br />
IC1A<br />
<strong>EPXA1F484C3</strong><br />
IC1A<br />
<strong>EPXA1F484C3</strong><br />
C58<br />
10n<br />
C58<br />
10n<br />
C37<br />
10n<br />
C37<br />
10n<br />
C70<br />
1n<br />
C70<br />
1n<br />
C3<br />
10n<br />
C3<br />
10n<br />
C111<br />
100n<br />
C111<br />
100n<br />
C54<br />
1n<br />
C54<br />
1n<br />
C33<br />
1n<br />
C33<br />
1n<br />
C99<br />
100n<br />
C99<br />
100n<br />
C29<br />
100n<br />
C29<br />
100n<br />
CF5<br />
1n<br />
CF5<br />
1n<br />
C46<br />
10n<br />
C46<br />
10n<br />
C25<br />
10n<br />
C25<br />
10n<br />
CF1<br />
1n<br />
CF1<br />
1n<br />
C42<br />
1n<br />
C42<br />
1n<br />
R119<br />
10R<br />
R119<br />
10R<br />
C21<br />
1n<br />
C21<br />
1n<br />
C59<br />
100n<br />
C59<br />
100n<br />
C71<br />
10n<br />
C71<br />
10n<br />
C17<br />
100n<br />
C17<br />
100n<br />
R120<br />
10R<br />
R120<br />
10R<br />
C113<br />
100n<br />
C113<br />
100n<br />
C55<br />
10n<br />
C55<br />
10n<br />
C34<br />
10n<br />
C34<br />
10n<br />
C104<br />
100n<br />
C104<br />
100n<br />
C51<br />
1n<br />
C51<br />
1n<br />
C30<br />
1n<br />
C30<br />
1n
5<br />
4<br />
3<br />
2<br />
1<br />
Routing Hints for the DCS Board<br />
D<br />
Place 10nF and 100nF capacitors as close as possible<br />
to the devices. Place power vias as close as possible to<br />
the related decoupling capacitors not to the related<br />
device. This may not allways work with BGAs but should<br />
work with all non BGA packages. See picture.<br />
wrong<br />
via*<br />
via*<br />
device<br />
via*<br />
via*<br />
okay<br />
D<br />
*via to supply or GND planes<br />
Grounding scheme for PLL, TTCrx and 120MHz LVDS driver<br />
C<br />
QOsc<br />
40MHz<br />
PLL 3V3<br />
Vreg<br />
C<br />
PLL_GND<br />
MUX1 PLL LVDS<br />
driver<br />
PLL_GND<br />
R124<br />
B<br />
B<br />
Board_GND<br />
TTCrx<br />
Optical Link<br />
Receiver<br />
A<br />
A<br />
Wednesday 2003.12.17 10:10<br />
Editor : Dirk Gottschalk<br />
Title<br />
DCS Board Routing Hints<br />
Size Document Number Rev<br />
A4<br />
12 1.60<br />
5<br />
4<br />
3<br />
Date: 2003.12.17 13:30<br />
Sheet 12 of<br />
14<br />
2<br />
1
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
PLL Configuration Table for TPC and TRD<br />
D<br />
TRD<br />
TPC<br />
default<br />
frequency 120 MHz 40 MHz<br />
R68<br />
no device<br />
10k<br />
R99<br />
0R_Jmpr<br />
no device<br />
R100<br />
no device<br />
no device<br />
R105<br />
no device<br />
no device<br />
R107<br />
0R_Jmpr<br />
no device<br />
C<br />
R108<br />
no device<br />
10k<br />
C<br />
R109<br />
0R_Jmpr<br />
10k<br />
R110<br />
0R_Jmpr<br />
10k<br />
RN48<br />
no device<br />
4x0R_Jmpr<br />
B<br />
B<br />
A<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
Editor : Dirk Gottschalk<br />
A<br />
Title<br />
PLL Clock Configuration<br />
Size Document Number Rev<br />
A4<br />
13 1.61<br />
5<br />
4<br />
3<br />
Date: 2005.05.02 10:00<br />
Sheet 13 of<br />
14<br />
2<br />
1
5<br />
4<br />
3<br />
2<br />
1<br />
D<br />
GND_PW<br />
J3<br />
1 2<br />
GND_<strong>ADC</strong><br />
GND_<strong>ADC</strong><br />
GND_TPLL<br />
J8<br />
1 2<br />
GND_PLL<br />
D<br />
B2S<br />
B2S<br />
J2<br />
1 2<br />
GND_PLLF<br />
GND_PLLF<br />
B2S<br />
J4<br />
1 2<br />
GND_ETH<br />
GND_ETH<br />
B2S<br />
C<br />
C<br />
J5<br />
1 2<br />
GND_TPLL<br />
GND_TPLL<br />
B2S<br />
J6<br />
1 2<br />
GND<br />
GND<br />
B2S<br />
B<br />
J7<br />
1 2<br />
GND<br />
GND<br />
B<br />
B2S<br />
J1<br />
1 2<br />
GND<br />
GND<br />
B2S<br />
J9<br />
1 2<br />
GND<br />
GND<br />
B2S<br />
A<br />
Company : KIP Uni-Heidelberg / Lindenstruth<br />
Editor : Dirk Gottschalk<br />
A<br />
Title<br />
DCS Ground Scheme<br />
Size Document Number Rev<br />
A<br />
14 1.60<br />
5<br />
4<br />
3<br />
Date: 2005.05.02<br />
Sheet 14 of<br />
14<br />
2<br />
1
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