Introduction.
Introduction.
Introduction.
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Workshop PG5<br />
Resources<br />
3.2.4 Counters<br />
& Timers<br />
31 Bit value ( 0 … 2 147 483 648)<br />
T/C V NV<br />
0 31 1599<br />
Timers and counters can have a value between 0 and 2 147 483 648 (31Bit) and<br />
they share the same address range: 0 to 1599. Usually addresses 0 to 31 is<br />
dedicated to the timers, and addresses 32 to 1599 are dedicated to the counters.<br />
Of course, you can configure this to your own personal settings. The timers by<br />
default, have a time-base of 100ms. (This means that the system will decrease<br />
every timer by one, every 100ms): The time base can be changed in the<br />
“Software Settings”, along with configuring the timer/counter addresses.<br />
Timers are volatile, counters are not.<br />
Timers and Counters can only contain positive values. Their value can be<br />
changed by loading a new value with the LD instruction.<br />
Timer values decrease only. Counters can count up or down, using the instruction<br />
INC/DEC. (Inc Dec ).<br />
Timers and counters can also be used with binary instructions<br />
When a timer or counter contains a non-zero value its state is High (1), when<br />
its content is zero its state is Low (0).<br />
Setup<br />
Timer/Counters:<br />
The distribution of the address range between timers and counters can be altered<br />
in the " Software Settings ". This is also where you can change the timebase<br />
of 100ms<br />
The more timers you declare, the greater the load on the CPU. This is<br />
also true if you lower the timebase. Take this into consideration before<br />
you change the number of timers or lower the timebase.<br />
Example: 100 timers will take about 2% of the CPU’s capacity.<br />
© Saia-Burgess Controls Ltd. Page 3-7