Application Note AN-1077 - International Rectifier
Application Note AN-1077 - International Rectifier
Application Note AN-1077 - International Rectifier
You also want an ePaper? Increase the reach of your titles
YUMPU automatically turns print PDFs into web optimized ePapers that Google loves.
<strong>Application</strong> <strong>Note</strong> <strong>AN</strong>-<strong>1077</strong><br />
Voltage Loop Compensation<br />
Typical of PFC converters is the requirement to<br />
keep the voltage loop bandwidth less than ½ the line<br />
frequency in order to avoid distortion of the line current<br />
resulting from the voltage loop attempting to<br />
regulate out the 120Hz ripple on the output.<br />
There is of course, the associated tradeoff between<br />
system transient response and input current<br />
distortion, where stability of the voltage loop is generally<br />
easily achieved.<br />
The goals of the voltage loop compensation are<br />
the limitation of the open loop gain bandwidth to less<br />
than ½ the AC line frequency and the amount of second<br />
harmonic ripple injected in the COMP pin from<br />
the error amplifier.<br />
First we need to calculate the amount of second<br />
harmonic ripple on the output capacitor:<br />
V<br />
OPK<br />
=<br />
2π ⋅ f<br />
2nd<br />
Pin<br />
⋅C<br />
O<br />
⋅V<br />
330W<br />
V OPK<br />
=<br />
= 3.<br />
4V<br />
2π<br />
⋅120⋅330µ<br />
F ⋅385V<br />
out<br />
(39)<br />
The amount of 120Hz ripple needs to be small<br />
compared with the value of the error amplifier output<br />
voltage swing.<br />
A percentage around 1% is typical and will minimize<br />
distortion:<br />
G<br />
VA<br />
V<br />
=<br />
COMP( EFF )<br />
2⋅V<br />
OPK<br />
⋅0.<br />
01<br />
6.<br />
05V<br />
⋅0.<br />
01<br />
G VA<br />
=<br />
= 0.<br />
089 = −41dB<br />
2⋅3.<br />
4V<br />
(40)<br />
As calculated from (26) the attenuation of the output<br />
divider is already:<br />
G VA<br />
− H1 = −6.<br />
2dB<br />
The second pole is usually placed at a much<br />
higher frequency than 120Hz, so the error amplifier<br />
transfer function can be approximated to:<br />
H<br />
g<br />
⋅(<br />
1+<br />
sR<br />
m<br />
gm Z<br />
( s ) ≅<br />
(41)<br />
2<br />
sCZ<br />
Since C Z has already been determined for the soft<br />
start, only R gm needs to be calculated by forcing:<br />
R<br />
gm<br />
=<br />
Substituting:<br />
H ( j π ⋅ f<br />
nd<br />
) = 6.<br />
2dB<br />
(42)<br />
2<br />
2<br />
2<br />
−<br />
⎛ G<br />
⎜<br />
⎝<br />
VA<br />
− H<br />
g<br />
m<br />
1<br />
⎞<br />
⎟<br />
⎠<br />
2<br />
C<br />
⎛ 1<br />
−<br />
⎜<br />
⎝ 2π<br />
⋅ f<br />
R gm<br />
= 8 . 9kΩ<br />
2nd<br />
)<br />
⋅C<br />
Z<br />
⎞<br />
⎟<br />
⎠<br />
2<br />
(43)<br />
The second pole frequency should be chosen<br />
higher than the cross over frequency and significantly<br />
lower than the switching frequency in order to attenuate<br />
noise: typical value is 1/6 to 1/10 of the switching<br />
frequency:<br />
f<br />
P0<br />
=<br />
2π<br />
⋅ R<br />
gm<br />
1<br />
1<br />
≅<br />
Cz ⋅Cp<br />
2π<br />
⋅ R<br />
Cz + Cp<br />
gm<br />
C 1<br />
= = nF<br />
p<br />
2 8.<br />
9kΩ ⋅17kHz<br />
1<br />
π ⋅<br />
(44)<br />
⋅Cp<br />
H = 0.<br />
018 = 34.<br />
8dB<br />
1<br />
−<br />
The gain of the error amplifier @ 120Hz needs to<br />
be:<br />
<strong>International</strong> <strong>Rectifier</strong> Technical Assistance Center: USA ++1 310 252 7105 Europe ++44 (0)208 645 8015 14 of 18