Manchester Transceiver Using the USART and XCL Modules on ...
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Manchester Transceiver Using the USART and XCL Modules on ...

Manchester Transceiver Using the USART and XCL Modules on ... Manchester Transceiver Using the USART and XCL Modules on ...

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Figure 3-4. ong>Manchesterong> encoding flowchart Start up Is it TX idle state? N Is it TX transmission state? N Y Y Is TX required? N Is transmission finished? N Y Y Set ong>USARTong> ong>andong> ong>XCLong> to TX state Clear ong>theong> transaction flag Prepare TX Data Set TX idle state Start up EDMA tranfer Set TX transmission state Exit 4. ong>Manchesterong> decoding Since ong>theong>re is no synchronous clock signal input, it is impossible to decode with LUT XOR or XNOR logic as ong>Manchesterong> encoding directly. ong>Manchesterong> code can be sampled by UASRT received bits. ong>USARTong> runs in asynchronous RX mode for data reception ong>andong> PLC of LUT controls ong>theong> variable length of data bits stream. The maximum length of ong>theong> stream is limited to 256 by PLC. EDMA can be used to transmit data from ong>USARTong> receiver register. Atmel AT03335: ong>Manchesterong> ong>Transceiverong> ong>Usingong> ong>theong> ong>USARTong> ong>andong> ong>XCLong> ong>Modulesong> on XMEGA E [APPLICATION NOTE] 42164A−AVR−07/2013 8

Figure 4-1. ong>Manchesterong> decoding structure ong>Manchesterong> code can be over sample with a higher ong>USARTong> baud rate than ong>Manchesterong> clock. Then ong>Manchesterong> code is decoded from ong>USARTong> sampled bits by firmware. This way can set tolerance of ong>Manchesterong> clock rate error flexibly because ong>theong> error is judged by firmware. Figure 4-2 illustrates a sample example with ong>USARTong> baud rate twelve times of ong>Manchesterong> code. The first six ong>USARTong> bits sample zero for ong>Manchesterong> low level ong>andong> ong>theong> next six sample one for ong>Manchesterong> high level. In this way ong>theong> maximum number ong>Manchesterong> code can be decoded limits to 256/12. Figure 4-2. ong>USARTong> bits sampling ong>Manchesterong> code ong>USARTong> bits sample 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 4.1 How to configure ong>USARTong> 1. Set control register C (CTRLC) 7 6 5 4 3 2 1 0 CMODE[1:0] PMODE[1:0] SBMODE CHSIZE[2:0] Bit 7:6 – CMODE[1:0]: Communication Mode Select asynchronous ong>USARTong> to sample ong>Manchesterong> code. Bit 5:4 – PMODE[1:0]: Parity Mode Bit 3 – SBMODE: Stop Bit Mode Bit 2:0 – CHSIZE[2:0]: Character Size Set up according to ong>Manchesterong> code frame structure. 2. Set control register D (CTRLD) 7 6 5 4 3 2 1 0 – – DECTYPE[1:0] LUTACT[1:0] PECACT[1:0] Bit 5:4 – DECTYPE[1:0]: Decoding ong>andong> encoding type Atmel AT03335: ong>Manchesterong> ong>Transceiverong> ong>Usingong> ong>theong> ong>USARTong> ong>andong> ong>XCLong> ong>Modulesong> on XMEGA E [APPLICATION NOTE] 42164A−AVR−07/2013 9

Figure 3-4. <str<strong>on</strong>g>Manchester</str<strong>on</strong>g> encoding flowchart<br />

Start up<br />

Is it TX idle<br />

state?<br />

N<br />

Is it TX<br />

transmissi<strong>on</strong><br />

state?<br />

N<br />

Y<br />

Y<br />

Is TX required?<br />

N<br />

Is transmissi<strong>on</strong><br />

finished?<br />

N<br />

Y<br />

Y<br />

Set <str<strong>on</strong>g>USART</str<strong>on</strong>g> <str<strong>on</strong>g>and</str<strong>on</strong>g><br />

<str<strong>on</strong>g>XCL</str<strong>on</strong>g> to TX state<br />

Clear <str<strong>on</strong>g>the</str<strong>on</strong>g><br />

transacti<strong>on</strong> flag<br />

Prepare TX Data<br />

Set TX idle state<br />

Start up EDMA<br />

tranfer<br />

Set TX<br />

transmissi<strong>on</strong> state<br />

Exit<br />

4. <str<strong>on</strong>g>Manchester</str<strong>on</strong>g> decoding<br />

Since <str<strong>on</strong>g>the</str<strong>on</strong>g>re is no synchr<strong>on</strong>ous clock signal input, it is impossible to decode with LUT XOR or XNOR logic as<br />

<str<strong>on</strong>g>Manchester</str<strong>on</strong>g> encoding directly. <str<strong>on</strong>g>Manchester</str<strong>on</strong>g> code can be sampled by UASRT received bits. <str<strong>on</strong>g>USART</str<strong>on</strong>g> runs in<br />

asynchr<strong>on</strong>ous RX mode for data recepti<strong>on</strong> <str<strong>on</strong>g>and</str<strong>on</strong>g> PLC of LUT c<strong>on</strong>trols <str<strong>on</strong>g>the</str<strong>on</strong>g> variable length of data bits stream. The<br />

maximum length of <str<strong>on</strong>g>the</str<strong>on</strong>g> stream is limited to 256 by PLC. EDMA can be used to transmit data from <str<strong>on</strong>g>USART</str<strong>on</strong>g> receiver<br />

register.<br />

Atmel AT03335: <str<strong>on</strong>g>Manchester</str<strong>on</strong>g> <str<strong>on</strong>g>Transceiver</str<strong>on</strong>g> <str<strong>on</strong>g>Using</str<strong>on</strong>g> <str<strong>on</strong>g>the</str<strong>on</strong>g> <str<strong>on</strong>g>USART</str<strong>on</strong>g> <str<strong>on</strong>g>and</str<strong>on</strong>g> <str<strong>on</strong>g>XCL</str<strong>on</strong>g> <str<strong>on</strong>g>Modules</str<strong>on</strong>g> <strong>on</strong> XMEGA E [APPLICATION NOTE]<br />

42164A−AVR−07/2013<br />

8

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