PCIe Devices - PLX Technology
PCIe Devices - PLX Technology
PCIe Devices - PLX Technology
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TLPs and Transactions<br />
n<br />
Transactions are carried using Requests and<br />
Completions<br />
l<br />
Allowable combinations of Read/Write Request and<br />
Completion operations vary depending on transaction type<br />
n<br />
TLP headers and TLP packet size are variable<br />
l<br />
TLP headers can be 3 or 4 DW in length<br />
– TLP packet may optionally have a 32-bit ECRC<br />
appended to the packet<br />
– A TLP packet may or may not carry a data payload<br />
• 4 KB maximum data payload, 1 DW minimum payload<br />
Copyright by Dashcourses, Inc. 2009<br />
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