PCIe Devices - PLX Technology
PCIe Devices - PLX Technology PCIe Devices - PLX Technology
What This Presentation Is About (continued) n PCIe is an extension of the basic PCI (Peripheral Component Interface) specification l l A brief review of the PCI architecture will be provided – System terminology, operation, and usage – Basic PCI and PCI-X protocol, bus operations, bus arbitration, and commands – Bridging in PCI – PCI device configuration space and configuration space access PCI and PCI-X will be discussed as it relates to PCIe and compatibility requirements Copyright by Dashcourses, Inc. 2009 Intro-4
Specifications n The current PCIe specifications as published by the PCI Special Interest group or PCI Sig are l PCIe 2.0 (December 20, 2006) – Supporting specifications • PCI Express Card Electromechanical Specification, Revision 1.12.0 • PCI Express to PCI/PCI-X Bridge Specification, Revision 1.0 • PCI Express Mini Card Electromechanical Specification, Revision 1.1 • PCI Local Bus Specification, Revision 3.0 • PCI-X Addendum to the PCI Local Bus Specification, Revision 2.0 • PCI Hot-Plug Specification, Revision 1.1 • PCI Standard Hot-Plug Controller and Subsystem Specification, Revision 1.0 • PCI-to-PCI Bridge Architecture Specification, Revision 1.2 • PCI Bus Power Management Interface Specification, Revision 1.2 • Advanced Configuration and Power Interface Specification, Revision 2.03.0b • Guidelines for 64-bit Global Identifier (EUI-64) Registration Authority Copyright by Dashcourses, Inc. 2009 Intro-5
- Page 1 and 2: Presents PCI Express Overview By Pa
- Page 3: What This Presentation Is About n T
- Page 7 and 8: Presentation Layout Section 1 - PCI
- Page 9 and 10: PCI Specification History n n n PCI
- Page 11 and 12: PCIe Compatibility and New Features
- Page 13 and 14: PCIe Interconnect - Chip-to-Board C
- Page 15 and 16: PCIe Design Possibilities Embedded
- Page 17 and 18: Compatibility with Existing PCI Spe
- Page 19 and 20: New Features n Improved data integr
- Page 21 and 22: Scalable Topologies n Hierarchies u
- Page 23 and 24: PCI and PCI-X Architecture and Comm
- Page 25 and 26: PCIe Command Execution Host System
- Page 27 and 28: PCIe Transactions and Packets n PCI
- Page 29 and 30: PCI Devices n n n PCI is based on a
- Page 31 and 32: PCI Topology with Multiple Host/PCI
- Page 33 and 34: PCIe Device/Function PCIe Single Fu
- Page 35 and 36: PCIe System Fabric PCIe Root Comple
- Page 37 and 38: PCI/PCI-X/PCIe Bridges n Bridges ar
- Page 39 and 40: PCI/PCI-X Arbitration Example n n F
- Page 41 and 42: PCIe Processing and Priorities n PC
- Page 43 and 44: Mythical Example VC ID and Priority
- Page 45 and 46: PCIe Root Complex n A Root Complex
- Page 47 and 48: PCIe Root Complex Model Host system
- Page 49 and 50: PCIe Switch Structure Upstream Port
- Page 51 and 52: PCIe Interrupts Host System Bus Whe
- Page 53 and 54: PCIe Link is a Point-to-Point Conne
What This Presentation Is About (continued)<br />
n<br />
<strong>PCIe</strong> is an extension of the basic PCI (Peripheral<br />
Component Interface) specification<br />
l<br />
l<br />
A brief review of the PCI architecture will be provided<br />
– System terminology, operation, and usage<br />
– Basic PCI and PCI-X protocol, bus operations, bus arbitration, and<br />
commands<br />
– Bridging in PCI<br />
– PCI device configuration space and configuration space access<br />
PCI and PCI-X will be discussed as it relates to <strong>PCIe</strong> and<br />
compatibility requirements<br />
Copyright by Dashcourses, Inc. 2009<br />
Intro-4
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