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SiLabs Si2400 - Connect One

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Reference Design<br />

Interface:<br />

The SL-IERB daughterboard plugs on to the <strong>Si2400</strong>URT-EBV on the JP3 and JP7<br />

sockets. See Table 1 and Table 2 for pin assignments. Table 3 includes SL-IERB pin<br />

descriptions.<br />

PIN NUMBER<br />

Pin description<br />

ON JP3<br />

<strong>Si2400</strong>URT-EVB<br />

Pin description<br />

ON J2<br />

SL-IERB Adapter<br />

1 ANA OUT NOT USED<br />

2 GND GND<br />

3 AUDIO IN NOT USED<br />

4 GND GND<br />

5 GPIO1 NOT USED<br />

6 GPIO2 NOT USED<br />

7 GPIO3 -DTRM<br />

8 GPIO4 -CDM<br />

9 RESET RESET<br />

10 RXD_T TXDM<br />

11 CTS_T2 -CTSM<br />

12 TXD_T RXDM<br />

13 TXD_R RXDH232<br />

14 CLK_OUT NOT USED<br />

15 RXD_R TXDH232<br />

16 CLK_IN NOT USED<br />

Table 1<br />

PIN NUMBER<br />

Pin description<br />

ON JP7<br />

<strong>Si2400</strong>URT-EVB<br />

Pin description<br />

ON J2A<br />

SL-IERB Adapter<br />

1 CTS_T NOT USED<br />

2 VD VCC (3.3Vdc )<br />

Table 2<br />

Page 2<br />

July 2001

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