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Requirements - Hardware Conference

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The impact of<br />

requirement traceability<br />

in safety critical designs<br />

Rick Stroot<br />

Senior Application Engineer<br />

InnoFour<br />

June, 2013


<strong>Requirements</strong><br />

Are there written requirements<br />

for the System, Software, PCB,<br />

FPGA?<br />

— Are they clear?<br />

— Are they complete?<br />

Will the requirements change?<br />

— How frequently?<br />

— How to manage the changes?<br />

How are the requirements<br />

being tracked?<br />

— Manually?<br />

— Only occasionally?<br />

— Not at all?<br />

System SW<br />

<strong>Requirements</strong><br />

PCB FPGA<br />

2<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer Overview Flow<br />

Cabling<br />

PCB<br />

Requirement Management<br />

System<br />

<strong>Requirements</strong><br />

<strong>Hardware</strong><br />

FPGAs/ASICs<br />

MPUs/DSPs<br />

Impact Analysis<br />

Traceability<br />

Matrix<br />

Software<br />

Automated Reporting<br />

3<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


<strong>Requirements</strong><br />

Design<br />

Specification<br />

Identifier<br />

Attributes<br />

References<br />

Description<br />

DS_02<br />

Priority : HIGH<br />

Covers : PR_02<br />

The design shall be power efficient<br />

<strong>Requirements</strong> to detail intended<br />

functionality of the chip<br />

Analyze requirement sources in<br />

place<br />

— <strong>Requirements</strong> Extracted From<br />

– DOORS<br />

– Word<br />

– Excel<br />

– PDF<br />

– Many other tools & databases<br />

Each requirement consists of a unique<br />

identifier, defined attributes,<br />

upstream references &<br />

it’s textual description<br />

4<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


<strong>Requirements</strong> Tracing<br />

Throughout the Development Stages<br />

Covers<br />

Covers<br />

Product<br />

<strong>Requirements</strong><br />

LRU<br />

Specification<br />

40% 60%<br />

Design<br />

Implementation<br />

Are all the<br />

requirements<br />

implemented &<br />

tested?<br />

What shall I<br />

work on next?<br />

What does<br />

this part of<br />

the LRU do?<br />

5<br />

Project<br />

Manager or<br />

Certification<br />

Authority<br />

<strong>Hardware</strong><br />

Designer<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com<br />

System<br />

Architect


Report Generation<br />

PR_01<br />

PR_02<br />

PR_03<br />

Covers<br />

DS_01<br />

DS_02<br />

DS_03<br />

Traceability<br />

Matrix Report<br />

PR_04<br />

DS_04<br />

PR_05<br />

Product<br />

<strong>Requirements</strong><br />

Covers<br />

DS_05<br />

Design<br />

Specification<br />

Common report generation<br />

— Traceability matrix<br />

— Impact analysis<br />

Fully customizable<br />

— Content, style, output format<br />

Accurately reflects current state of<br />

the live project data<br />

Generate artifacts for safety compliance audits or design reviews<br />

6<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer:<br />

Traceability Matrix Report<br />

7<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


Impact Analysis<br />

Understand the Effect of an Engineering Change Order (ECO)<br />

Impact<br />

Change<br />

Covers<br />

Impact<br />

Impact<br />

Impact<br />

Covers<br />

Impact<br />

Product<br />

<strong>Requirements</strong><br />

Design<br />

Specification<br />

Design<br />

Implementation<br />

20% 40% 60%<br />

Can I make a<br />

change to this<br />

requirement?<br />

This might<br />

push out the<br />

schedule!<br />

Which tests do<br />

we need to<br />

update?<br />

System<br />

Architect<br />

Project<br />

Manager<br />

Quality<br />

Assurance<br />

8<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


Change Management<br />

Snapshot & Compare Project Status<br />

DS_02<br />

Alpha<br />

Priority : HIGH<br />

Covers : PR_02<br />

The design shall be power efficient<br />

DS_02<br />

Beta<br />

Priority : CRITICAL<br />

Covers : PR_02, PR_06<br />

The design shall be power efficient<br />

Ability to compare the<br />

requirement data at points<br />

throughout the project life cycle<br />

— <strong>Requirements</strong> definition<br />

— Traceability information<br />

Generate impact analysis<br />

reports<br />

— Based upon the changes that<br />

have occurred<br />

Compare between different<br />

snapshots<br />

— Or against the current analysis<br />

of the live data<br />

Automate communication<br />

between team members<br />

— When changes occur<br />

9<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer:<br />

Snapshot<br />

10<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


Composite Projects<br />

Cabling<br />

PCB<br />

Bring multiple<br />

ReqTracer projects<br />

together<br />

System-wide<br />

requirement<br />

coverage<br />

System<br />

<strong>Requirements</strong><br />

<strong>Hardware</strong><br />

Software<br />

FPGAs/ASICs<br />

MPUs/DSPs<br />

Global project<br />

reports /<br />

traceability<br />

matrix<br />

Overall project<br />

visibility<br />

Sub-projects<br />

independently<br />

maintained<br />

11<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer:<br />

Composite Projects<br />

12<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer:<br />

System Modeling Tracking<br />

13<br />

System<br />

<strong>Requirements</strong><br />

System<br />

Modeling<br />

Concept<br />

Verification Plan<br />

Simulation &<br />

Analysis Results<br />

Concept verification<br />

Provides a virtual lab<br />

for creating &<br />

analyzing analog,<br />

digital, & mixed-signal<br />

systems<br />

Allows design<br />

verification of<br />

hierarchical schematic<br />

& circuit elements<br />

Provides concept<br />

verification through<br />

block diagrams &<br />

transfer function<br />

blocks<br />

Reduce cost & delays<br />

of prototyping<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer:<br />

PCB <strong>Requirements</strong> Tracking<br />

PCB<br />

<strong>Requirements</strong><br />

Constraints: CES<br />

Schematics<br />

BOM<br />

parts list<br />

Verification Plan<br />

System Modelling<br />

& Test Circuits<br />

Simulation &<br />

Analysis Results<br />

Constraints<br />

— Associate<br />

constraints on a net<br />

with a requirement<br />

Schematic<br />

— Associate a<br />

schematic block<br />

with a requirement<br />

Verification Results<br />

— Associate results<br />

from PCB<br />

verification tools<br />

such as<br />

signal integrity,<br />

manufacturability &<br />

thermal analysis<br />

with a requirement<br />

14<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer Interface to Constraint Editing<br />

System (CES) & DxDesigner (DxD)<br />

15<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer:<br />

Software <strong>Requirements</strong> Tracking<br />

Integration to<br />

Mentor’s CodeBench<br />

in development<br />

Software<br />

<strong>Requirements</strong><br />

Architecture<br />

(ex. UML)<br />

Implementation<br />

Unit Tests<br />

IDE for out-of-box<br />

bare-metal & Linux<br />

development<br />

Comprehensive<br />

target support<br />

— From<br />

microcontrollers<br />

to advanced<br />

microprocessors<br />

QA Plan<br />

Test Results<br />

Broad evaluation<br />

board support<br />

— Enables “install-todebug”<br />

in minutes<br />

16<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer<br />

17<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer:<br />

FPGA/ASIC <strong>Requirements</strong> Tracking<br />

VHDL<br />

FPGA/<br />

ASIC<br />

<strong>Requirements</strong><br />

Verilog<br />

Design<br />

Sources<br />

VHDL<br />

Verilog<br />

Test Bench<br />

Sources<br />

Verification Results<br />

Just because<br />

you are<br />

designing to an<br />

FPGA, doesn’t<br />

mean you get a<br />

second chance<br />

when your<br />

product fails in<br />

the field!<br />

Verification Plan<br />

18<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer:<br />

Tracing FPGA Data<br />

19<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


HDL Designer:<br />

Referencing <strong>Requirements</strong><br />

20<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


Reusing <strong>Requirements</strong> Tags<br />

Reusing previously designed IP/design blocks<br />

— Proven design code<br />

— Documentation, test plan, testbench<br />

— Identified & tagged requirements<br />

Design<br />

Block<br />

Test Plan<br />

FPGA<br />

Design<br />

Block<br />

(RTL Source)<br />

Design<br />

Block<br />

<strong>Requirements</strong><br />

Specification<br />

Embedded<br />

Tags<br />

Design<br />

Block<br />

Test Bench<br />

Embedded Tags<br />

Assumes<br />

— Consistent or standardized requirements tagging format<br />

— Non-overlapping requirement IDs<br />

21<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


Referencing the Upstream <strong>Requirements</strong><br />

Target IP for new project<br />

References managed by ReqTracer to prevent the<br />

documents from having to be edited<br />

Design<br />

Block<br />

<strong>Requirements</strong><br />

Specification<br />

Design<br />

Specification<br />

Identifier<br />

Attributes<br />

References<br />

Description<br />

DS_02<br />

Priority : HIGH<br />

Covers : PR_02<br />

The design shall be power efficient<br />

Target to upstream<br />

FPGA requirements<br />

Determine if any<br />

requirements are<br />

missing or no longer<br />

needed<br />

— For the new project<br />

22<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


ReqTracer:<br />

Link Management<br />

23<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


<strong>Requirements</strong><br />

ReqTracer Summary<br />

24<br />

Automate tracking of requirements<br />

Automate report generation<br />

— Up to the minute status reports<br />

— Detail of overall project status<br />

Interactive visibility of the<br />

requirement coverage<br />

throughout all design data<br />

— Analyze potential problems<br />

& bottlenecks<br />

Traceability can span<br />

multiple design domains<br />

— ESL, RTL, PCB, etc.<br />

Helps compliance with<br />

safety standards<br />

— DO-254, DO-178B<br />

— ISO 26262<br />

System<br />

PCB<br />

SW<br />

FPGA<br />

© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com


© 2012 Mentor Graphics Corp. Company Confidential<br />

www.mentor.com

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