Switch - PLX Technology
Switch - PLX Technology Switch - PLX Technology
PEX 8311 Overview ‣ Generic Local bus to PCI Express Bridge • Available in volume production ‣ Generic Local Bus • 32-Bit, Up to 66MHz • Multiplexed (C-Mode) & Non-Multiplex (J-Mode) • 2 DMA Channels • Register Backward compatible with PLX PCI 9056, 9656 & 9054 • Local Bus protocol backward compatible with PLX PCI 9056 & 9656 up to 66MHz PEX 8311 32-bit / 66MHz Local Bus ‣ PCI Express • x1 Lane PCIe • Integrated SerDes • Rev 1.0a compliant • Maximum payload size: 128B • 1 Virtual Channel • Hot plug support in EndPoint mode © PLX Aug 2007 60
System Controller Card EEPROM SRAM FPGA DSP Proprietary ASIC Local CPU PEX 8311 Generic Local Bus ‣ Root Complex mode ‣ Control Path implementation: x1 lane ‣ Interface to Switching Fabric cards & I/O Cards ‣ Generic interface to local bus devices ‣ Backward compatible to PCI 9xxx family ‣ 2 Gbps generic local bus/PCIe link © PLX Aug 2007 61
- Page 9 and 10: PCI Express in Embedded FPGA FPGA B
- Page 11 and 12: PLX: Switch Market Leading Supplier
- Page 13 and 14: Port Flexibility ‣ Flexible • P
- Page 15 and 16: Crosslink & Moveable Upstream Port
- Page 17 and 18: Cut-Thru ‣ Cut-Thru Architecture
- Page 19 and 20: Port Arbitration ‣ Allows priorit
- Page 21 and 22: Non-Blocking Internal Architecture
- Page 23 and 24: Spread Spectrum Clock Support T Hos
- Page 25 and 26: VAUX/WAKE#/Beacon WAKE#/Beacon Supp
- Page 27 and 28: Additional Key Features ‣ Quality
- Page 29 and 30: 48 Lane Switch ‣ PEX 8548 • Ind
- Page 31 and 32: Storage Servers CPU Chip Set Memory
- Page 33 and 34: 32 Lane Port Configurations PEX 853
- Page 35 and 36: 24 Lane Port Configurations PEX 852
- Page 37 and 38: 16 Lane Port Configurations x4 PEX
- Page 39 and 40: 12 Lane Port Configurations x4 PEX
- Page 41 and 42: 8 Lane Port Configurations PEX 8508
- Page 43 and 44: 5 Lane Port Configurations x1 PEX 8
- Page 45 and 46: Bridge Road Map - PCI, PCI-X, PCIe
- Page 47 and 48: PEX 8111 Overview ‣ Proven Intero
- Page 49 and 50: Example on Motherboard PCI Slots PC
- Page 51 and 52: PCI Features ‣ PCI r3.0 compliant
- Page 53 and 54: PCIe to PCI-X Bridge Example 4 4 PE
- Page 55 and 56: PCI-X/PCI Bus Features ‣ PCI-X r1
- Page 57 and 58: AdvancedTCA with AMC PCI - X PCI-X
- Page 59: Local Bus Bridge Road Map Local/PCI
- Page 63: End of Presentation Thank You www.p
PEX 8311 Overview<br />
‣ Generic Local bus to PCI Express Bridge<br />
• Available in volume production<br />
‣ Generic Local Bus<br />
• 32-Bit, Up to 66MHz<br />
• Multiplexed (C-Mode) & Non-Multiplex (J-Mode)<br />
• 2 DMA Channels<br />
• Register Backward compatible with<br />
<strong>PLX</strong> PCI 9056, 9656 & 9054<br />
• Local Bus protocol backward compatible with<br />
<strong>PLX</strong> PCI 9056 & 9656 up to 66MHz<br />
PEX 8311<br />
32-bit / 66MHz<br />
Local Bus<br />
‣ PCI Express<br />
• x1 Lane PCIe<br />
• Integrated SerDes<br />
• Rev 1.0a compliant<br />
• Maximum payload size: 128B<br />
• 1 Virtual Channel<br />
• Hot plug support in EndPoint mode<br />
© <strong>PLX</strong> Aug 2007 60
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