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Dual-Host & Failover Options ‣ Two methods of implementing Failover Systems • Non-Transparent Port • Crosslink & Moveable Upstream Port Primary Host Secondary Host ‣ Crosslink & Moveable Upstream Port • Utilized when user has full control of system software (OS) and enumeration process Switch ‣ Non-Transparent Port • Utilized when user has no or limited control of system software (OS) and/or enumeration process © PLX Aug 2007 14
Crosslink & Moveable Upstream Port CPU 1 CPU 2 Chip Set Memory Chip Set Memory Upstream End Point Switch Downstream Crosslink Switch End Point End Point End Point End Point ‣ Crosslink allows 2 downstream ports to link up ‣ Crosslink and moveable upstream functions can be used to provide dual host or fail-over capability © PLX Aug 2007 15
- Page 1 and 2: PLX Technology PCI Express Products
- Page 3 and 4: PLX Interconnect Products ‣ PLX i
- Page 5 and 6: PCI Express in Servers Bridge GE CP
- Page 7 and 8: PCI Express in Peripherals & Consum
- Page 9 and 10: PCI Express in Embedded FPGA FPGA B
- Page 11 and 12: PLX: Switch Market Leading Supplier
- Page 13: Port Flexibility ‣ Flexible • P
- Page 17 and 18: Cut-Thru ‣ Cut-Thru Architecture
- Page 19 and 20: Port Arbitration ‣ Allows priorit
- Page 21 and 22: Non-Blocking Internal Architecture
- Page 23 and 24: Spread Spectrum Clock Support T Hos
- Page 25 and 26: VAUX/WAKE#/Beacon WAKE#/Beacon Supp
- Page 27 and 28: Additional Key Features ‣ Quality
- Page 29 and 30: 48 Lane Switch ‣ PEX 8548 • Ind
- Page 31 and 32: Storage Servers CPU Chip Set Memory
- Page 33 and 34: 32 Lane Port Configurations PEX 853
- Page 35 and 36: 24 Lane Port Configurations PEX 852
- Page 37 and 38: 16 Lane Port Configurations x4 PEX
- Page 39 and 40: 12 Lane Port Configurations x4 PEX
- Page 41 and 42: 8 Lane Port Configurations PEX 8508
- Page 43 and 44: 5 Lane Port Configurations x1 PEX 8
- Page 45 and 46: Bridge Road Map - PCI, PCI-X, PCIe
- Page 47 and 48: PEX 8111 Overview ‣ Proven Intero
- Page 49 and 50: Example on Motherboard PCI Slots PC
- Page 51 and 52: PCI Features ‣ PCI r3.0 compliant
- Page 53 and 54: PCIe to PCI-X Bridge Example 4 4 PE
- Page 55 and 56: PCI-X/PCI Bus Features ‣ PCI-X r1
- Page 57 and 58: AdvancedTCA with AMC PCI - X PCI-X
- Page 59 and 60: Local Bus Bridge Road Map Local/PCI
- Page 61 and 62: System Controller Card EEPROM SRAM
- Page 63: End of Presentation Thank You www.p
Dual-Host & Failover Options<br />
‣ Two methods of implementing Failover Systems<br />
• Non-Transparent Port<br />
• Crosslink & Moveable Upstream Port Primary<br />
Host<br />
Secondary<br />
Host<br />
‣ Crosslink & Moveable Upstream Port<br />
• Utilized when user has full control of<br />
system software (OS)<br />
and enumeration process<br />
<strong>Switch</strong><br />
‣ Non-Transparent Port<br />
• Utilized when user has no or limited control of system<br />
software (OS) and/or enumeration process<br />
© <strong>PLX</strong> Aug 2007 14
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