Microprogramming: History and Evolution - Edwardbosworth.com
Microprogramming: History and Evolution - Edwardbosworth.com Microprogramming: History and Evolution - Edwardbosworth.com
The IA–32 Control Unit (Part 2) The later implementations of the IA–32 have used a combination of hardwired and microprogrammed control in the design of the control units. The choice of the control method depends on the complexity of the instruction. The hardwired control unit is used for all instructions that are simple enough to be executed in a single pass through the datapath. Fortunately, these instructions are the most common in most executable code. Instructions that are too complex to be handled in one pass through the datapath are passed to the microprogrammed controller. IA–32 designs beginning with the Pentium 4 have addressed the complexity inherent in the IA–32 instruction set architecture in an entirely new way, which might be called a ―RISC Core‖. Each 32–bit instruction is mapped into a number of micro–operations. In the Pentium 4, the micro–operations are stored in a trace cache, which is form of a Level–1 Instruction Cache (I–Cache). Each instruction is executed from the trace cache. There are two possibilities, either the micro–operations are passed to the hardwired control unit, or a routine in the microprogrammed control ROM is called.
References (Davies, 1972) Readings in microprogramming, P. M. Davies, IBM Systems Journal, Vol. 11, No.1, pages 16 –40, 1972 (Hennessy & Patterson, 1990) Computer Architecture: A Quantitative Approach, ISBN 1 – 55860 – 069 – 8, Sections 5.9 & 5.10 (pages 240 – 243). (Kozuh, 1984) System/370 capability in a desktop computer, F. T. Kozuh, et. al., IBM Systems Journal, Volume 23, Number 3, Page 245 (1984). (Murdocca, 2007) Computer Architecture and Organization, Miles Murdocca and Vincent Heuring, John Wiley & Sons, 2007 ISBN 978 – 0 – 471 – 73388 – 1. (Tucker, 1967) Microprogram control for System/360, S. G. Tucker, IBM Systems Journal, Vol. 6, No 4. pages 222 – 241 (1967) (Warford, 2005) Computer Systems, Jones and Bartlett, 2005 ISBN 0 – 7637 – 3239 – 7 (Wilkes and Stringer, 1953) Microprogramming and the Design of the Control Circuits in an Electronic Digital Computer. Proc Cambridge Phil Soc 49:230-238, 1953. - Reprinted as chapter 11 in: DP Siewiorek, CG Bell, and A Newell. Computer Structures: Principles and Examples. New York: McGraw-Hill, 1982, ISBN 0 – 07 – 057302 – 6. - Also reprinted in: MV Wilkes. The Genesis of Microprogramming. Annals Hist. Computing 8n3:116-126, 1986.
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- Page 7 and 8: Maurice Wilkes Maurice Wilkes worke
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The IA–32 Control Unit (Part 2)<br />
The later implementations of the IA–32 have used a <strong>com</strong>bination of hardwired <strong>and</strong><br />
microprogrammed control in the design of the control units.<br />
The choice of the control method depends on the <strong>com</strong>plexity of the instruction.<br />
The hardwired control unit is used for all instructions that are simple enough to be<br />
executed in a single pass through the datapath. Fortunately, these instructions are<br />
the most <strong>com</strong>mon in most executable code.<br />
Instructions that are too <strong>com</strong>plex to be h<strong>and</strong>led in one pass through the datapath are<br />
passed to the microprogrammed controller.<br />
IA–32 designs beginning with the Pentium 4 have addressed the <strong>com</strong>plexity inherent in<br />
the IA–32 instruction set architecture in an entirely new way, which might be called a<br />
―RISC Core‖. Each 32–bit instruction is mapped into a number of micro–operations.<br />
In the Pentium 4, the micro–operations are stored in a trace cache, which is form of a<br />
Level–1 Instruction Cache (I–Cache). Each instruction is executed from the trace cache.<br />
There are two possibilities, either the micro–operations are passed to the hardwired<br />
control unit, or a routine in the microprogrammed control ROM is called.
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