Microprogramming: History and Evolution - Edwardbosworth.com

Microprogramming: History and Evolution - Edwardbosworth.com Microprogramming: History and Evolution - Edwardbosworth.com

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Microprogramming: The Late Evolution ―The Mc2 [microprogramming control] level was the standard design for practically all commercial computers until load/store architectures became fashionable in the 1980s‖. Events that lead to the reduced emphasis on microprogramming include: 1. The availability of VLSI technology, which allowed a number of improvements, including on–chip cache memory, at reasonable cost. 2. The availability of ASIC (Application Specific Integrated Circuits) and FPGA (Field Programmable Gate Arrays), each of which could be used to create custom circuits that were easily tested and reconfigured. 3. The beginning of the RISC (Reduced Instruction Set Computer) movement, with its realization that complex instruction sets were not required. Modern design practice favors a ―mixed control unit‖ with hardwired control for the simpler (and more common) instructions and microcode implementation of the more complex (mainly legacy code) instructions. The later versions (80486 and following) of the Intel IA–32 architecture provide a good example of this ―mixed mode‖ control unit. We examine these to close the lecture. (page 618 of Warford, 2005)

The IA–32 Control Unit In order to understand the IA–32 control unit, we must first comment on a fact of instruction execution in the MIPS. Every instruction in the MIPS can be executed in one pass through the data path. What is meant by that? In this chapter, we have studied two variants of the MIPS data path. 1. A single–cycle implementation in which every instruction is completely executed in one cycle, hence one pass through the data path. 2. A multi–cycle implementation, in which the execution of each instruction is divided into 3, 4, or 5 phases, with one clock pulse per phase. Even here, the instructions can be viewed as taking one pass through the data path. The MIPS was designed as a RISC machine. Part of this design philosophy calls for efficient execution of instructions; the single pass through the data path is one result. The IA–32 architecture, with its requirement for support of legacy designs, is one example of a CISC (Complex Instruction Set Computer). Some instructions can be executed in 3 or 4 clock cycles, but some require hundreds of clock cycles. The design challenge for the later IA–32 implementations is how to provide for quick execution of the simpler instructions without penalizing the more complex ones.

<strong>Microprogramming</strong>: The Late <strong>Evolution</strong><br />

―The Mc2 [microprogramming control] level was the st<strong>and</strong>ard design for practically all<br />

<strong>com</strong>mercial <strong>com</strong>puters until load/store architectures became fashionable in the 1980s‖.<br />

Events that lead to the reduced emphasis on microprogramming include:<br />

1. The availability of VLSI technology, which allowed a number of improvements,<br />

including on–chip cache memory, at reasonable cost.<br />

2. The availability of ASIC (Application Specific Integrated Circuits) <strong>and</strong> FPGA<br />

(Field Programmable Gate Arrays), each of which could be used to create<br />

custom circuits that were easily tested <strong>and</strong> reconfigured.<br />

3. The beginning of the RISC (Reduced Instruction Set Computer) movement, with<br />

its realization that <strong>com</strong>plex instruction sets were not required.<br />

Modern design practice favors a ―mixed control unit‖ with hardwired control for the<br />

simpler (<strong>and</strong> more <strong>com</strong>mon) instructions <strong>and</strong> microcode implementation of the more<br />

<strong>com</strong>plex (mainly legacy code) instructions.<br />

The later versions (80486 <strong>and</strong> following) of the Intel IA–32 architecture provide a good<br />

example of this ―mixed mode‖ control unit. We examine these to close the lecture.<br />

(page 618 of Warford, 2005)

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