05 Arithmetic in VHDL
05 Arithmetic in VHDL
05 Arithmetic in VHDL
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<strong>Arithmetic</strong> Package Example- III<br />
• Architecture def<strong>in</strong>ition<br />
use ieee.numeric_std.all;<br />
architecture BEHAVIOR of UPCOUNTER is<br />
signal <strong>in</strong>ternal_count : unsigned (3 downto 0);<br />
beg<strong>in</strong><br />
-- see previous slide for process<br />
count
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