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Abhishek Acharya,Rajesh Mehra,Vikram Singh Takher, Int. J. Comp. Tech. Appl., Vol 2 (2), 349-358 ISSN:2229-6093 Table 2: Comparison of Resources of FPGA (Spartan 3) used in the implementation of Non Uniform Illumination Correction Algorithm with existing Method Resources Under Consideration Our Approach (AHE) Existing Method (CSC) Used Available Used Available Number of Slices 301 1920 307 1920 Number of Slice Flip Flop 440 3840 446 3840 Number of 4 input LUTs 535 3840 545 3840 Number of Bonded IOBs 73 173 75 173 Maximum Frequency 128.54 MHz 129.721 Reference: [1]. Carl Steven Rapp, Image Processing and Image Enhancement, East Tennessee University, Johnson City, Texas. [2]. Kiran, M.; Kan Mei War; Lim Mei Kuan; Liang Kim Meng; Lai Weng Kin, Implementing image processing algorithms using ‗Hardware in the loop‘ approach, IEEE Conference on Electronic Design, December 1-3, 2008, Penang, Malaysia pp 1-6. [3]. T. Moreo, P. N. Lorente, F. S. Valles, J. S. Muro, C. F. Andrés, Experiences on developing computer vision hardware algorithms using Xilinx system generators, Elsevier Journal of Microprocessors and Microsystems 29, 2005 pp 411- 419. [4]. Yinpeng Jin, Laura Fayad, Andrew Laine, Contrast Enhancement by Multi-scale Adaptive Histogram Equalization, Department of Biomedical Engineering, Columbia University, New York, NY. [5]. Kassem, M. Hamad, E. Haidamous, Image Compression on FPGA using DCT, IEEE Conference on Advances in Computational Tools for Engineering Applications, 2009 Zouk Mosbeh, Lebanon pp 220-223. [6]. T. Saidani , D. Dia, W. Elhamzi, M. Atri and R. Tourki, Hardware Co-simulation For Video Processing Using Xilinx System Generator, Proceedings of the World Congress on Engineering 2009 Vol I, London, UK pp 151 - 155. [7]. Alba M. Sánchez G., Ricardo Alvarez G., Sully Sánchez G.; FCC and FCE BUAP, Architecture for filtering images using Xilinx System Generator, International Journal of Mathematics & Computers in Simulation, Issue 2, Volume 1, 2007 pp 101 – 107. [8]. N. Shirazi, J. Ballagh, Put Hardware in the Loop with Xilinx System Generator for DSP, Xcell Journal, Fall 2003 pp 01-03. [9]. Sima Haifeng Liu Lanlan, Local Adaptive Image Enhancement Based on HSI Space, Third International Symposium on Computer Science and Computational Technology(ISCSCT ‘10), Jiaozuo, P. R. China, 14-15,August 2010, pp. 253-255. [10]. Chi-Jeng Chang, Pei-Yung Hsiao, Zen-Yi Huang, Integrated Operation of Image Capturing and Processing in FPGA, IJCSNS, Journal of Computer Science and Network Security, VOL.6 No.1A, January 2006 pp 173 - 180. 356
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