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Abhishek Acharya,Rajesh Mehra,Vikram S<strong>in</strong>gh Takher, Int. J. Comp. Tech. Appl., Vol 2 (2), 349-358<br />

ISSN:2229-6093<br />

[31]. Chakalabbi Jairaj M., Shaila Subbaraman, QMF<br />

Implementation us<strong>in</strong>g Xil<strong>in</strong>x System Generator<br />

(XSG), 3rd IEEE International Conference on<br />

Computer Science and Information Technology ,<br />

2010 pp 142 - 145.<br />

[32]. Yadong Wu, Zhiq<strong>in</strong> Liu, Yongguo Han,<br />

Hongy<strong>in</strong>g Zhang, An <strong>Image</strong> illum<strong>in</strong>ation<br />

<strong>Correction</strong> Algorithm based on Tone Mapp<strong>in</strong>g,<br />

IEEE 3rd International Congress on <strong>Image</strong> and<br />

Signal Process<strong>in</strong>g (CISP2010), pp 648-648<br />

[33]. WANG Zhim<strong>in</strong>g, TAO Jianhua, A Fast<br />

Implementation of Adaptive Histogram<br />

Equalization, IEEE International Conference on<br />

Signal Process<strong>in</strong>g, 2006 pp 52-55.<br />

[34]. I. Alston, B. Madahar, From C to netlists:<br />

hardware eng<strong>in</strong>eer<strong>in</strong>g for software eng<strong>in</strong>eers?,<br />

Electronics and Communication Eng<strong>in</strong>eer<strong>in</strong>g<br />

Journal 14 (4) (2002) 165–173.<br />

[35]. I.S. Uzun, A.A.A. Bouridane, <strong>FPGA</strong><br />

implementations of fast Fourier transforms for<br />

real-time signal and image process<strong>in</strong>g, IEEE<br />

International Conference on Field-Programmable<br />

Technology (FPT), 2003, pp. 102–109.<br />

areas of <strong>in</strong>terest are VLSI Design and its application<br />

<strong>in</strong> signal and image process<strong>in</strong>g systems Mr. Acharya<br />

has been awarded by various organizations for<br />

excellence <strong>in</strong> teach<strong>in</strong>g learn<strong>in</strong>g process.<br />

Rajesh Mehra: Mr. Rajesh Mehra<br />

is currently Assistant Professor at National Institute<br />

of Technical Teachers’ Tra<strong>in</strong><strong>in</strong>g & Research,<br />

Chandigarh, India. He is pursu<strong>in</strong>g his PhD from<br />

Panjab University, Chandigarh, India. He has<br />

completed his M.E. from NITTTR, Chandigarh, India<br />

and B. Tech from NIT, Jalandhar, India. Mr. Mehra<br />

has 15 years of academic experience. He has<br />

authored more than 40 research papers <strong>in</strong> national,<br />

<strong>in</strong>ternational conferences and reputed journals. His<br />

<strong>in</strong>terest areas are VLSI Design, Embedded System<br />

Design, Advanced Digital Signal Process<strong>in</strong>g,<br />

Wireless & Mobile Communication and Digital<br />

System Design. Mr. Mehra is life member of ISTE.<br />

[36]. A. T. Moreo, P. N. Lorente, F. S. Valles, J. S.<br />

Muro, C. F. Andrés, Experiences on develop<strong>in</strong>g<br />

computer vision hardware algorithms us<strong>in</strong>g<br />

Xil<strong>in</strong>x system generators, Microprocessors and<br />

Microsystems 29, (2005) 411- 419.<br />

[37]. C. Vicente-Chicote, A. Toledo, P. Sanchez-<br />

Palma, <strong>Image</strong> Process<strong>in</strong>g Application<br />

Development: From Rapid Prototyp<strong>in</strong>g to<br />

SW/HW Co-simulation and Automated Code<br />

Generation, Spr<strong>in</strong>ger-Verlag, pp.659-666, 2005.<br />

Authors Biography:<br />

Vikram S<strong>in</strong>gh Takher: Mr. Vikram<br />

S<strong>in</strong>gh Takher is currently Lecturer (senior scale) at<br />

Govt. Polytechnic College, Bikaner, Rajasthan,<br />

India. He is pursu<strong>in</strong>g his M.E. from NITTTR,<br />

Chandigarh, India. He has completed his B.E. from<br />

MNIT, Jaipur, Rajasthan, India. Mr. Takher has 14<br />

years of academic experience. He has authored 03<br />

research papers <strong>in</strong> national conferences and 04<br />

research papers <strong>in</strong> <strong>in</strong>ternational conferences. Mr.<br />

Takher’s <strong>in</strong>terest areas are VLSI Design, Embedded<br />

System Design & Advanced Digital Signal<br />

Process<strong>in</strong>g<br />

Abhishek Acharya: Mr. Abhishek<br />

Acharya is currently work<strong>in</strong>g as Assistant Professor<br />

<strong>in</strong> the Department of Electronics & Communication<br />

at Govt. Eng<strong>in</strong>eer<strong>in</strong>g College Bikaner. He received<br />

his B.E. from University of Rajasthan, Jaipur and he<br />

has been a M.E Scholar of NITTTR Chandigarh. He<br />

has around 8 years of teach<strong>in</strong>g experience at UG/PG<br />

level. He has authored around 15research papers to<br />

various <strong>in</strong>ternational and national conferences. His<br />

358

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