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Nagavalli Voleti et al ,Int.J.<strong>Computer</strong> Technology & Applications,Vol 3 (1), 475-479<br />
ISSN:2229-6093<br />
Query Driven Architecture for Programmable Network Measurement<br />
Nagavalli Voleti 1 , Sudha Madhuri. M 2<br />
1 Pursu<strong>in</strong>g M.Tech(CS), Nalanda Institute <strong>of</strong> Eng<strong>in</strong>eer<strong>in</strong>g & Technology, Siddharth Nagar, Sattenapalli,<br />
Guntur., Affiliated to JNTUK, Kak<strong>in</strong>ada, A.P., India.<br />
2 Asst. Pr<strong>of</strong>essor, Department <strong>of</strong> <strong>Computer</strong> Science Eng<strong>in</strong>eer<strong>in</strong>g, Nalanda Institute <strong>of</strong> Eng<strong>in</strong>eer<strong>in</strong>g &<br />
Technology, Siddharth Nagar, Sattenapalli, Guntur., Affiliated to JNTUK, Kak<strong>in</strong>ada, A.P., India.<br />
valli.voleti@gmail.com<br />
Abstract - Accurate and real-time traffic<br />
measurement is becom<strong>in</strong>g <strong>in</strong>creas<strong>in</strong>gly critical for<br />
large variety <strong>of</strong> applications <strong>in</strong>clud<strong>in</strong>g account<strong>in</strong>g,<br />
bandwidth provision<strong>in</strong>g and security analysis. Exist<strong>in</strong>g<br />
network measurement techniques, however, have major<br />
difficulty deal<strong>in</strong>g with large number <strong>of</strong> flows <strong>in</strong> today’s<br />
high-speed networks and <strong>of</strong>fer limited scalability with<br />
<strong>in</strong>creas<strong>in</strong>g l<strong>in</strong>k speeds. Consequently, the current state<br />
<strong>of</strong> the art solutions have to resort to conservative<br />
sampl<strong>in</strong>g <strong>of</strong> the traffic stream and/or account<strong>in</strong>g for<br />
only a few frequent flows that <strong>of</strong>ten fail to provide<br />
accurate estimates <strong>of</strong> traffic features. In this paper, we<br />
present a novel hardware-s<strong>of</strong>tware codesigned solution<br />
that is programmable and adaptable to runtime<br />
situations <strong>of</strong>fer<strong>in</strong>g high-throughputs that can easily<br />
match current l<strong>in</strong>k-speeds. The key to our design is<br />
orthogonalization <strong>of</strong> memory lookups from traffic<br />
measurements through our query-driven measurement<br />
scheme. We have prototyped our approach on a Xil<strong>in</strong>x<br />
platform us<strong>in</strong>g Microblaze s<strong>of</strong>t-core processors<br />
<strong>in</strong>tegrated with Virtex-II Pro FPGA fabric. We<br />
demonstrate the scalability <strong>of</strong> our architecture and also<br />
compare it with a recent <strong>of</strong>fl<strong>in</strong>e (non realtime)<br />
sampl<strong>in</strong>g-based s<strong>of</strong>tware alternative. The comparison<br />
shows that our architecture performs orders better <strong>in</strong><br />
terms <strong>of</strong> speed and throughput even while be<strong>in</strong>g used as<br />
an <strong>of</strong>fl<strong>in</strong>e solution.<br />
Keywords— Traffic Measurement, Query driven, ProgME.<br />
1.INTRODUCTION<br />
Accurate traffic measurement and monitor<strong>in</strong>g is<br />
keystone <strong>in</strong> a wide range <strong>of</strong> network applications such<br />
as detection <strong>of</strong> security attacks, traffic eng<strong>in</strong>eer<strong>in</strong>g,<br />
account<strong>in</strong>g and anomaly detection. A number <strong>of</strong><br />
network management decisions such as block<strong>in</strong>g traffic<br />
to a victim dest<strong>in</strong>ation, re-rout<strong>in</strong>g traffic, charg<strong>in</strong>g<br />
customer, or rais<strong>in</strong>g alarms to adm<strong>in</strong>istrators, require<br />
extract<strong>in</strong>g real-time statistics <strong>of</strong> network traffic. A<br />
network measurement tool is crucial <strong>in</strong> judiciously<br />
mak<strong>in</strong>g such decisions [1]. Fundamentally, traffic<br />
measurement <strong>in</strong>volves count<strong>in</strong>g number <strong>of</strong> packets that<br />
satisfy some criteria, commonly referred to as user<br />
query or a rule, over a period <strong>of</strong> time. The traffic is<br />
measured <strong>in</strong> terms <strong>of</strong> flows, where a flow refers to a set<br />
<strong>of</strong> packets that have the same n-tuple value <strong>in</strong> their<br />
header fields. Typical def<strong>in</strong>itions <strong>of</strong> flow <strong>in</strong>clude the 6-<br />
tuple: {prt, tos, sip, spt, dip, dpt} where, prt is the<br />
protocol field, tos is type <strong>of</strong> service, sip and dip are the<br />
source and dest<strong>in</strong>ation IP addresses and spt and dpt are<br />
the source and dest<strong>in</strong>ation ports, respectively.<br />
Traditional measurement schemes work by<br />
ma<strong>in</strong>ta<strong>in</strong><strong>in</strong>g unique“per-flow”based counters on highdensity<br />
storage media, followed by aggregation <strong>of</strong><br />
selected counters to answer queries [2]. This<br />
mechanism is illustrated <strong>in</strong> Figure 1. Note that there is<br />
an <strong>in</strong>herent and <strong>in</strong>creas<strong>in</strong>gly-widen<strong>in</strong>g performance gap<br />
between high-density storage access time and network<br />
bandwidth. Furthermore, it requires too much<br />
process<strong>in</strong>g and I/O overhead to ma<strong>in</strong>ta<strong>in</strong> such a<br />
paradigm. As a result, traditional schemes do not <strong>of</strong>fer<br />
scalable measurement solutions for high data rate<br />
networks and have to resort to sampl<strong>in</strong>g [3]. The<br />
sample is processed <strong>of</strong>fl<strong>in</strong>e to extract any mean<strong>in</strong>gful<br />
<strong>in</strong>formation from the collected statistics. Cisco<br />
NetFlow [1] is one such widely deployed sample-based<br />
traffic measurement solution.<br />
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ISSN:2229-6093<br />
2. PROPOSED APPROACH<br />
Figure 1: Per-flow statistics collection<br />
The key issue with sample based solutions is<br />
measurement accuracy [2]. We argue that a scalable1<br />
solution for real-time and accurate measurement <strong>of</strong><br />
traffic has to dispose <strong>of</strong> conventional “per-flow” -based<br />
statistics collection. Instead, we propose a “querydriven”measurement<br />
methodology that works by<br />
pr<strong>of</strong>il<strong>in</strong>g pass<strong>in</strong>g traffic accord<strong>in</strong>g to the given query to<br />
collect <strong>in</strong>formation <strong>of</strong> <strong>in</strong>terest <strong>in</strong> real-time. Unlike<br />
exist<strong>in</strong>g techniques, our solution processes stream<strong>in</strong>g<br />
traffic at l<strong>in</strong>k speeds and hence, does not compromise<br />
measurement accuracy due to sampl<strong>in</strong>g. Figure 2<br />
depicts the idea <strong>of</strong> our proposed solution.<br />
Figure 2: Query-driven Measurement<br />
We develop a novel hardware-s<strong>of</strong>tware co-designed<br />
architecture to evaluate our idea. The architecture<br />
conta<strong>in</strong>s a highly-parallel and scalable array <strong>of</strong><br />
process<strong>in</strong>g elements that are dynamically programmed<br />
accord<strong>in</strong>g to user queries. The traffic flows through the<br />
array at l<strong>in</strong>k speed, and <strong>in</strong>formation <strong>of</strong> <strong>in</strong>terest are<br />
collected by process<strong>in</strong>g elements. The control unit <strong>of</strong><br />
the architecture coord<strong>in</strong>ates aggregation <strong>of</strong> collected<br />
<strong>in</strong>formation and respond<strong>in</strong>g to queries. Furthermore, it<br />
oversees reconfiguration <strong>of</strong> process<strong>in</strong>g elements. We<br />
implemented our architecture on a commodity field<br />
programmable gate array (FPGA) runn<strong>in</strong>g at modest<br />
100-MHz frequency.<br />
The per-flow based method has been employed <strong>in</strong><br />
several measurement tools like NeTraMet [2],<br />
FlowScan [5], sFlow [6] and Cisco NetFlow [1]. The<br />
scalability issues associated with Cisco Netflow [1]<br />
have been discussed us<strong>in</strong>g static and dynamic adaptive<br />
probabilistic sampl<strong>in</strong>g <strong>in</strong> Sampled [4] and Adaptive<br />
Netflow (ANF) [7], respectively. Sampl<strong>in</strong>g, however,<br />
captures arbitrary statistical and systematic variations <strong>in</strong><br />
the <strong>of</strong>fered traffic and favors large flows. The issue <strong>of</strong><br />
biasness is alleviated by utiliz<strong>in</strong>g sample and hold<br />
method, where a flow is sampled based on a bernoulli<br />
trial [8]. Another <strong>in</strong>terest<strong>in</strong>g solution proposed is to<br />
smartly sample an arbitrary small number <strong>of</strong> flows that<br />
are “best” representative <strong>of</strong> the traffic stream . Some<br />
other elegant solutions work by extrapolat<strong>in</strong>g the<br />
collected sample us<strong>in</strong>g statistical <strong>in</strong>ference. Our<br />
proposed technique differs from above as we advocate<br />
a non-sampled real-time stream<strong>in</strong>g or onl<strong>in</strong>e solution<br />
which does not suffer from <strong>in</strong>accuracies <strong>of</strong> sample<br />
based <strong>of</strong>fl<strong>in</strong>e solutions.<br />
Due to scalability issues associated with ma<strong>in</strong>ta<strong>in</strong><strong>in</strong>g<br />
perflow schemes, many researchers argue that it is<br />
<strong>in</strong>feasible to accurately measure each and every flow on<br />
high speed l<strong>in</strong>ks. Instead, they advocate focus<strong>in</strong>g on<br />
few most frequent flows . Detect<strong>in</strong>g such heavy hitters,<br />
or elephant flows, is an important monitor<strong>in</strong>g task for<br />
both security-purposes (example, denial-<strong>of</strong>-service<br />
attacks) and traffic eng<strong>in</strong>eer<strong>in</strong>g (example., route<br />
selection). Work has been done <strong>in</strong> produc<strong>in</strong>g traffic<br />
summary or identify<strong>in</strong>g hierarchical heavy hitters.<br />
Aguri and Aut<strong>of</strong>ocus are traffic pr<strong>of</strong>ilers that aggregate<br />
flows and report if they are above certa<strong>in</strong> threshold.<br />
These are <strong>of</strong>fl<strong>in</strong>e tools that work by aggregat<strong>in</strong>g perflow<br />
statistics bottom-up, i.e. from longest prefix to the<br />
shortest. In a DDOS type attack where there could be<br />
substantial number <strong>of</strong> low frequency flows (mice), the<br />
bottom-up strategy <strong>in</strong>volves storage and aggregation<br />
over huge number <strong>of</strong> flows before the victim can be<br />
isolated. This problem is studied by Zhang et al. <strong>in</strong> [9]<br />
by treat<strong>in</strong>g flow account<strong>in</strong>g problem as IP packet<br />
classification problem [10] us<strong>in</strong>g a top-down multibittrie<br />
based approach. However, the tries require multiple<br />
memory accesses that makes the method <strong>in</strong>feasible for<br />
real-time process<strong>in</strong>g while us<strong>in</strong>g DRAMs at current<br />
l<strong>in</strong>k-speeds [10]. Some other elegant solutions are<br />
based on co<strong>in</strong>cidence that exploit the fact that one is<br />
more likely to observe n consecutive packets from the<br />
same flow if the flow is large or long-lived. These<br />
techniques also favor large flows without knowledge <strong>of</strong><br />
user requirements.<br />
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ISSN:2229-6093<br />
A recent solution, ProgME [11], addresses<br />
programmability and scalability by aggregat<strong>in</strong>g flows<br />
based on user’s queries. Our technique differs from<br />
ProgME that we do away with its computational<br />
paradigm that is tuned for s<strong>of</strong>tware based<br />
implementation. Another solution [12] performs similar<br />
aggregation for collect<strong>in</strong>g distributed statistics on<br />
network processors. Instead, we employ a novel querydriven<br />
architecture as shown <strong>in</strong> Figure-1(b) that can<br />
perform network measurements at a node on pass<strong>in</strong>g by<br />
traffic <strong>in</strong> realtime.<br />
the configured superegions. A high level diagram <strong>of</strong><br />
our co-designed architecture is presented <strong>in</strong> Figure-3.<br />
3.QUERY- DRIVEN APPROACH FOR<br />
NETWORK TRAFFIC MEASUREMENTS<br />
In this section, we describe the details <strong>of</strong> our<br />
solution for the problem <strong>of</strong> real-time traffic<br />
measurements. To the best <strong>of</strong> our knowledge, we have<br />
developed the first system that not only supports realtime<br />
network measurements but can also admit new<br />
queries dur<strong>in</strong>g normal operation. We addresses the<br />
bottleneck posed due to query lookups by hardwir<strong>in</strong>g<br />
them <strong>in</strong> a custom process<strong>in</strong>g eng<strong>in</strong>e. The problem due<br />
to slower DRAM updates is tackled us<strong>in</strong>g a twopronged<br />
strategy. First, we reduce the number <strong>of</strong><br />
updates us<strong>in</strong>g our query-driven approach. Secondly, we<br />
parallelize the query process<strong>in</strong>g such that the <strong>in</strong>com<strong>in</strong>g<br />
data can be processed <strong>in</strong> real-time, thereby f<strong>in</strong>enesses<br />
the need for its sampl<strong>in</strong>g. Consequently, our focus has<br />
been on simplify<strong>in</strong>g the common case, i.e. the flow<br />
identification or query answer<strong>in</strong>g. We use superegions<br />
to def<strong>in</strong>e the rules that are not only more powerful than<br />
superflows but also simpler to process. Their only<br />
downside be<strong>in</strong>g extra checks required to process.<br />
However, we utilized the mutual exclusiveness <strong>of</strong> the<br />
checks to parallelize them <strong>in</strong> the process<strong>in</strong>g eng<strong>in</strong>e. We<br />
will shortly discuss the details <strong>of</strong> evaluat<strong>in</strong>g a query<br />
when we discuss our datapath.<br />
The measurement solutions detailed <strong>in</strong> literature<br />
mostly place their process<strong>in</strong>g kernels <strong>in</strong> either a<br />
complete s<strong>of</strong>tware or a hardware doma<strong>in</strong>. However, we<br />
note that the problem has an <strong>in</strong>terest<strong>in</strong>g blend <strong>of</strong><br />
contrast<strong>in</strong>g requirements such as user level<br />
configurability as well as need for fast real-time<br />
response. Whereas configurability and control can be<br />
efficiently handled <strong>in</strong> s<strong>of</strong>tware, a hardware doma<strong>in</strong> is<br />
more appropriate for fast real-time process<strong>in</strong>g. We<br />
therefore exploit the advantages <strong>of</strong> either doma<strong>in</strong> by<br />
mapp<strong>in</strong>g the operations that are best suited for<br />
respective goals: a general purpose processor for<br />
process<strong>in</strong>g control and configurations on a hardware<br />
datapath that matches <strong>in</strong>com<strong>in</strong>g flows <strong>in</strong> realtime with<br />
Figure 3: Architecture<br />
3.1. Parallel and Pipel<strong>in</strong>ed Programmable<br />
Architecture<br />
The design presented <strong>in</strong> Figure-3 employs a high<br />
degree <strong>of</strong> parallelism that can be scaled accord<strong>in</strong>g to<br />
the needs <strong>of</strong> the deployment. It consists <strong>of</strong> a control<br />
processor and a hardware data path that is composed <strong>of</strong><br />
parallel and pipel<strong>in</strong>ed Process<strong>in</strong>g Elements, PEs. The<br />
synchronization between the data path and the control<br />
unit is done us<strong>in</strong>g a timer while <strong>in</strong>teraction between the<br />
cycle-accurate hardware and noncycle accurate<br />
s<strong>of</strong>tware is streaml<strong>in</strong>ed us<strong>in</strong>g the Glue-Logic. The PEs<br />
are arranged <strong>in</strong> parallel and pipel<strong>in</strong>ed data path and can<br />
be <strong>in</strong>dependently configured for concurrent match<strong>in</strong>g <strong>of</strong><br />
different superegions. The task level parallelism <strong>of</strong> a<br />
PE is comb<strong>in</strong>ed with architectural pipel<strong>in</strong><strong>in</strong>g to<br />
ma<strong>in</strong>ta<strong>in</strong> scalability <strong>of</strong> the data path. Note that a PE can<br />
<strong>in</strong>dependently keep track <strong>of</strong> a superegion. The<br />
pipel<strong>in</strong><strong>in</strong>g ensures that data and control <strong>in</strong>formation<br />
streams through the PEs unidirectionally on separate<br />
channels. Thus data path size alteration requires simple<br />
plugg<strong>in</strong>g-<strong>in</strong> or removal <strong>of</strong> PEs with<strong>in</strong> a cha<strong>in</strong> dur<strong>in</strong>g<br />
design synthesis which has no effect on operat<strong>in</strong>g<br />
effectiveness <strong>of</strong> others. on operat<strong>in</strong>g effectiveness <strong>of</strong><br />
others. We will further discuss scalability <strong>of</strong> the<br />
datapath when we evaluate our design.<br />
Control Processor:<br />
The control processor orchestrates both spatial and<br />
temporal allocation and programm<strong>in</strong>g <strong>of</strong> PEs to service<br />
<strong>in</strong>com<strong>in</strong>g user queries. By orthogonaliz<strong>in</strong>g querycontrol<br />
from its correspond<strong>in</strong>g statistics-collection, our<br />
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Nagavalli Voleti et al ,Int.J.<strong>Computer</strong> Technology & Applications,Vol 3 (1), 475-479<br />
ISSN:2229-6093<br />
architecture can be dynamically configured dur<strong>in</strong>g<br />
normal operation to admit new user queries or switch<br />
its focus from one application to another. This dynamic<br />
change <strong>in</strong> behavior does not <strong>in</strong>volve an FPGA (or<br />
device) level (re)configuration which is prohibitively<br />
expensive for network<strong>in</strong>g applications. In con trast, this<br />
is done through a relatively simple chang<strong>in</strong>g <strong>of</strong> values<br />
<strong>in</strong> PE registers. These changes are controlled by the<br />
control processor.<br />
Programmable Process<strong>in</strong>g Element:<br />
PEs are parameterizable and programmable. They<br />
can be statically parameterized (static configuration)<br />
dur<strong>in</strong>g hardware synthesis to employ 2n number <strong>of</strong><br />
counters and dynamically programmed by the control<br />
processor(dynamic configuration) dur<strong>in</strong>g runtime to<br />
track different superegions. PEs can also be<br />
dynamically programmed to operate <strong>in</strong> either a s<strong>in</strong>gle<br />
or multiple counter mode. A s<strong>in</strong>gle counter can<br />
accommodate statistics-collection for a def<strong>in</strong>ed<br />
superegion. In certa<strong>in</strong> network<strong>in</strong>g applications, like<br />
Heavy Hitter Identification (discussed later), there is a<br />
need to track subregions with<strong>in</strong> a superegion for f<strong>in</strong>er<br />
resolution <strong>of</strong> statistics. The multiple counter mode is<br />
useful <strong>in</strong> such situations. When used <strong>in</strong> multiple<br />
counter mode, a PE auto sub-divides the search space<br />
<strong>in</strong>to as many superegions, thereby avoid<strong>in</strong>g allocation<br />
<strong>of</strong> dedicated PEs. We refer to the level <strong>of</strong><br />
subdivision<strong>in</strong>g as zoom ratio (ZR). The PEs have<br />
separate data and control channels. The data channel is<br />
32-bits wide and passes-on the <strong>in</strong>com<strong>in</strong>g data at the<br />
output irrespective <strong>of</strong> the PE’s operat<strong>in</strong>g mode or state<br />
(discussed shortly). A PE also passes on the control<br />
codes and signals to the next PE <strong>in</strong> the cha<strong>in</strong> unless it is<br />
wait<strong>in</strong>g for configuration codes. By keep<strong>in</strong>g data and<br />
control on separate channels, a PE <strong>in</strong> a row can rema<strong>in</strong><br />
active while other PEs <strong>in</strong> the same row are be<strong>in</strong>g<br />
configured. The PEs also employ a timer counter that<br />
represents the number <strong>of</strong> <strong>in</strong>terrupts (or timer<br />
expirations) after which a PE’s collected statistics are<br />
due to be returned to the control processor. All the<br />
dynamic configurable parameters <strong>of</strong> a PE<br />
are controlled through the control processor.<br />
Glue Logic:<br />
Besides configuration, another core problem we<br />
faced is the classic co-designed problem <strong>in</strong> <strong>in</strong>terfac<strong>in</strong>g<br />
fast, cycle accurate and parallel hardware with noncycle<br />
accurate and slow s<strong>of</strong>tware. The Glue-Logic<br />
addresses the problem by act<strong>in</strong>g as a handshak<strong>in</strong>g<br />
<strong>in</strong>terface between the two doma<strong>in</strong>s and synchronization<br />
protocol (SP). It receives and acknowledges data and<br />
control codes from s<strong>of</strong>tware-processor and passes on<br />
these values to the datapath-eng<strong>in</strong>e. As s<strong>of</strong>tware<br />
processors are slower than the hardware, they may take<br />
multiple clock cycles to send a value result<strong>in</strong>g <strong>in</strong> empty<br />
bubbles where no valid value is present <strong>in</strong> a cycle. The<br />
presence <strong>of</strong> these bubbles can fail the synchronization<br />
protocol and are therefore taken care <strong>of</strong> <strong>in</strong> the glue<br />
logic that sends the <strong>in</strong>formation to the datapath along<br />
with certa<strong>in</strong> extra signals for proper <strong>in</strong>terpretation <strong>of</strong><br />
the <strong>in</strong>formation. Besides act<strong>in</strong>g as an <strong>in</strong>terface, another<br />
function <strong>of</strong> the glue logic is to facilitate the control<br />
processor <strong>in</strong> properly configur<strong>in</strong>g PEs. On occurrence<br />
<strong>of</strong> an <strong>in</strong>terrupt, there could be multiple PEs <strong>in</strong> different<br />
rows that are ready to return their collected statistics.<br />
One naive way to <strong>in</strong>terface the controller with the data<br />
path would be to use as many return l<strong>in</strong>ks as data path<br />
rows. However this design not only uses redundant<br />
l<strong>in</strong>ks, as the controller can only service one l<strong>in</strong>k at any<br />
given time, but is also unscalable. We therefore use a<br />
s<strong>in</strong>gle return queue <strong>in</strong>terfaced to the control unit and<br />
employ an order<strong>in</strong>g sequence for row configuration.<br />
This sequence is dynamically calculated <strong>in</strong> the control<br />
unit and is sent to the glue-logic that uses this<br />
<strong>in</strong>formation to activate a required row <strong>in</strong> the datapath.<br />
4. CONCLUSION<br />
We have presented a programmable, adaptable and<br />
scalable hardware-s<strong>of</strong>tware co-designed solution for<br />
real-time network traffic measurement. We prototyped<br />
our design on a Virtex-II Pro platform operat<strong>in</strong>g at a<br />
mere 100-MHz and showed the superiority <strong>of</strong> our<br />
query-driven measurement paradigm aga<strong>in</strong>st per-flow<br />
based solutions. We demonstrated heavy hitter<br />
identification problem as one <strong>of</strong> the potential<br />
network<strong>in</strong>g problems to utilize the query-answer<strong>in</strong>g<br />
platform. To the best <strong>of</strong> our knowledge, this is first<br />
realtime network measurement solution, <strong>of</strong>fer<strong>in</strong>g a high<br />
degree <strong>of</strong> accuracy and performance. Comparison with<br />
a recently proposed network measurement solution<br />
validates superiority <strong>of</strong> our prototype.<br />
REFERENCES<br />
[1] Cisco NetFlow.<br />
http: //www.cisco.com/warp/public/732/Tech/netflow.<br />
[2] N. Brownlee, C. Mills, and G. Ruth. Traffic Flow<br />
Measurement: Architecture. RFC 2722, 1999.<br />
http://www.ietf.org/rfc/rfc2722.txt.<br />
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Nagavalli Voleti et al ,Int.J.<strong>Computer</strong> Technology & Applications,Vol 3 (1), 475-479<br />
ISSN:2229-6093<br />
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AUTHORS PROFILE<br />
Nagavalli Voleti, Pursu<strong>in</strong>g<br />
M.Tech(CS) from Nalanda<br />
Institute <strong>of</strong> Eng<strong>in</strong>eer<strong>in</strong>g &<br />
Technology,Siddharth Nagar,<br />
Sattenapalli, Guntur Affiliated to<br />
JNTUK, Kak<strong>in</strong>ada, A.P., India.<br />
My research Interests are<br />
computer networks.<br />
Sudha Madhuri. M, work<strong>in</strong>g as<br />
Asst. Pr<strong>of</strong>essor, Department <strong>of</strong><br />
<strong>Computer</strong> Science Eng<strong>in</strong>eer<strong>in</strong>g at<br />
Nalanda Institute <strong>of</strong> Eng<strong>in</strong>eer<strong>in</strong>g<br />
& Technology,Siddharth Nagar,<br />
Sattenapalli, Guntur Affiliated to<br />
JNTUK, Kak<strong>in</strong>ada, A.P., India.<br />
My research Interests are Data<br />
M<strong>in</strong><strong>in</strong>g and Comuter Networks.<br />
[10] G. Varghese. Network Algorithmics. Morgan Kaufmann,<br />
2005.<br />
[11] L. Yuan, C.-N. Chuah, and P. Mohapatra. ProgME:<br />
towards programmable network measurement. In SIGCOMM,<br />
pages 97–108, 2007.<br />
[12] T. Wolf, R. Ramaswamy, S. Bunga, and N. Yang. An<br />
architecture for distributed real-time passive network<br />
measurement. In MASCOTS, pages 335–344, 2006.<br />
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