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JUNE 28 WEDNESDAY MORNING<br />

WS-18-WeM-INV.9 PHYSICAL AND TECHNOLOGICAL ASPECTS OF MEMS VAC-<br />

UUM PACKAGING. F. Völklein, A. Meier, FH Wiesbaden, University of Applied Sciences. Am<br />

Brückweg 26, D-65428 Rüsselsheim, Germany<br />

The realization of Micro Electro Mechanical Systems (MEMS) or Micro Opto Electro Mechanical<br />

Systems (MOEMS) requires sofisticated fabrication technologies based on thin film deposition,<br />

photolithography and etching techniques. MEMS fabrication can be divided into three<br />

major groups:<br />

i) fabrication with additive and subtractive processes on the wafer level<br />

ii) packaging, involving processes such as bonding, lead attachment and encapsulation in a protective<br />

body or in cavities with reduced gas pressure (vacuum)<br />

iii) testing, including package leak test, electrical integrity and MEMS functionality.<br />

The last two process groups incorporate the most costly steps. MEMS packaging is more difficult<br />

and expensive than packaging of Integrated Circuits (IC) and may be totally different (e.g. for gas<br />

sensors) from IC housing.<br />

MEMS vacuum packaging is required for accelerometers in order to optimize the damping of the devices.<br />

High-Q micro resonators might need a good vacuum. Mechnical vacuum sensors using piezoresistive<br />

or capacitive measuring effects include small cavities (volumes in the order of 1 mm³)<br />

with reduced reference pressure or vacuum.<br />

Cavity sealing can serve as a batch-compatible packaging technique by encapsulating a chip feature<br />

or whole chip at a time. Chip features can be sealed by surface micromachining using Polysilicon or<br />

Silicon Nitride deposition techniques and sacrificial layer technology. Such micromachined surface<br />

packages (microshells) are much smaller than typical bulk MEMS packages. Microshells can be<br />

made by defining thin gaps (100 nm) between the substrate and the perimeter of the structural elements<br />

by etching away a sacrificial layer sandwiched between the two and then sealing the resulting<br />

gaps. In so-called reactive sealing thermal oxidation of the Polysilicon and Si-substrate seals the narrow<br />

openings left after removal of the spacer phosphosilicate (PSG) sacrificial layer. Alternatively,<br />

sealant films, such as oxides and nitrides, can be deposited over small etchant holes. The first commercial<br />

absolut Polysilicon pressure sensor incorporates such a reactively sealed vacuum shell. Epitaxial<br />

cavity sealing and HEXIL cavity sealing are alternative technologies. These and other lithography-defined<br />

packages, such as those involving ultraviolet patternable polymers, might be an integral<br />

part of the overall fabrication processs and lend to inexpensive batch solutions.<br />

In bulk micromachining and Si fusion-bonded (SFB) surface micromachining, cavities are fabricated<br />

by bonding, respectively, a glass plate (anodic bonding) or a Si wafer (fusion bonding) over etched<br />

cavities in a bottom Si wafer. Field-assisted thermal bonding (anodic bonding, also known as electrostatic<br />

bonding) can be established between a sodium-rich glass and Silicon at relatively low process<br />

temperatures. This method is mostly applicable to wafer-scale chip bonding. SFB is performed<br />

between flat Si wafers with slightly oxidized surfaces. When incorporating an intermediate layer between<br />

two substrates, many thermal vacuum bonding techniques are feasible. Silicon microstructures<br />

can be sealed together by eutectic bonding, e.g. Au-Si eutectic bonding at 363°C. The most important<br />

problems of MEMS vacuum packaging are the very small volumes of cavities combined with<br />

the outgassing during the sealing process. Long term stable vacuum in microcavities can be realized<br />

by using thin getter layers and sealing materials with low permeation coefficients.<br />

106

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