The LUT-SR family of uniform random number generators for FPGA ...

770 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 21, NO. 4, APRIL 2013
David B. Thomas (M’06) received the M.Eng. and Ph.D. degrees in computer
science from Imperial College London, London, U.K., in 2001 and 2006,
respectively.
He has been a Lecturer with the Electrical and Electronic Engineering
Department, Imperial College London, since 2010. His current research
interests include hardware-accelerated cluster computing, field-programmable
gate array-based Monte Carlo simulation, algorithms and architectures for
random number generation, and financial computing.
Wayne Luk (F’09) received the M.A., M.Sc., and D.Phil. degrees in
engineering and computing science from the University of Oxford, Oxford,
U.K.
He is a Professor of computer engineering with Imperial College London,
London, U.K., and a Visiting Professor with Stanford University, Stanford,
CA, and Queens University Belfast, Belfast, U.K. His current research
interests include theory and practice of customizing hardware and software
for specific application domains, such as multimedia, networking, and finance.