R8C/17 IIC Sample Project (Using HEW4 and E8) - von Gunthard ...

App199/1.0
R8C/17 I 2 C Sample Project (Using HEW4 and E8)
Introduction
The purpose of this application note is to provide example serial communication code for the
R8C17 device.
The application utilises an MBR8C17 board, an E8 debugger and a dual power supply. This
board has an external crystal, a power connector, microcontroller connections and an E8
connector.
All code was developed using Renesas’s High Performance Embedded Workshop 4 (HEW) with
the M16C toolchain, Ver 5.30.02. The code was developed on an R8C/17 using the On-Chip
Debug functionality via an E8 Emulator.
A picture of the MBR8C17 is shown below in figure 1.
Figure 1: MBR8C17 board
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Contents
INTRODUCTION .......................................................................................................................................... 1
CONTENTS.................................................................................................................................................. 2
R8C FAMILY OVERVIEW............................................................................................................................ 4
SYSTEM OVERVIEW .................................................................................................................................. 4
THE LCD MODULE ..................................................................................................................................... 8
HARDWARE SETUP USING I 2 C COMMUNICATION .............................................................................. 10
THE I 2 C PERIPHERAL .............................................................................................................................. 13
1. ICCR1 & 2 BUS CONTROL REGISTERS H’00B8 & H’00B9 ........................................... 15
2. ICMR – I 2 C BUS MODE REGISTER H’00BA................................................................ 17
3. ICIER – I 2 C BUS INTERTRUPT ENABLE REGISTER H’00BB .......................................... 18
4. ICSR – I 2 C BUS STATUS REGISTER H’00BC.............................................................. 20
5. SAR – SLAVE ADDRESS REGISTER H’00BD .............................................................. 21
6. ICDRT – I 2 C BUS TRANSMIT DATA REGISTER H’00BE ................................................ 22
7. ICDRR – I 2 C BUS RECEIVE DATA REGISTER H’00BF .................................................. 22
8. ICDRS – I 2 C BUS SHIFT REGISTER................................................................................ 22
SOFTWARE DESCRIPTION FOR DEMONSTRATION............................................................................ 23
9. CODE PURPOSE............................................................................................................. 23
10. EXTERNAL CODE OPERATION.......................................................................................... 23
11. R8C17 WORKSPACE ..................................................................................................... 23
FILE NAMES AND PURPOSES............................................................................................................... 23
12. CODE FUNCTIONS .......................................................................................................... 24
VOID MAIN(VOID) ................................................................................................................................ 24
VOID SWITCH_MAIN_CLOCK(VOID) ...................................................................................................... 25
VOID INIT_LEDS(VOID)......................................................................................................................... 26
VOID FLASH_LED2(VOID).................................................................................................................... 26
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App199/1.0
VOID DELAY(VOID) ............................................................................................................................. 27
INIT_IIC(VOID).................................................................................................................................... 27
VOID WRITE_BYTES(VOID) .................................................................................................................. 28
WRITE_DATA_END() ................................................................................................................................ 29
CONCLUSION ........................................................................................................................................... 29
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R8C/17 IIC Sample Project (Using HEW4 and E8)
R8C Family Overview
The R8C devices have an internal 16-bit architecture, 89 instructions, 2 banks of seven 16-bit
registers and various peripheral functions.
The relatively low pin count, peripheral mix and high performance of the R8C range make them
ideal for applications within Security Alarms, Small Sensors, Utility Meters, Small applications,
White Goods, toys and TV equipment plus many others.
System Overview
The R8C17 has an R8C core with 89 instructions, a minimum instruction execution time of 50nS
at 20MHz and a memory space of 1 Mbyte.
It has the following peripherals:
• Timer X: 8 bits × 1 channel,
• Timer Z: 8 bits × 1 channel
• Timer C: 16 bits × 1 channel
• I 2 C bus Interface (I 2 C)(1) 1 channel
• A/D Converter 10-bit A/D converter: 1 circuit, 4 channels
• Watchdog Timer 15 bits ×1 channel (with prescaler), Reset start selectable, Count source
protection mode
• Interrupt Internal: 9 factors, External: 4 factors, Software: 4 factors,
• Priority level: 7 levels
• Clock Generation Circuit 2 circuits
• Main clock oscillation circuit (Equipped with a built-in feedback resistor), On-chip
oscillator (high speed, low speed) Equipped with frequency adjustment function on highspeed
on-chip oscillator
• Oscillation Stop Detection Function, Main clock oscillation stop detection function
• Voltage Detection Circuit Included
• Power-On Reset Circuit Included
Figure 2 shows the peripherals used in this demo
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Figure 2: R8C17 Peripheral use in application
Some I/O pins are used to drive LEDs. The I 2 C interface is used for communication with an
LCD module. The on chip emulator was used in conjunction with an E8 for code development.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Development Environment
Figure 3 shows the environment (hardware and software) used to develop the application.
Figure 3: Application Set-up
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R8C/17 IIC Sample Project (Using HEW4 and E8)
The laptop PC runs HEW4 and has the E8 drivers installed. HEW provides a code developing
environment, and also allows code to be debugged on the device using the E8.
A 3.3V power supply is required to power the micon board when the final application is running
without intervention with the E8. The E8 may be used to power the micon board when using the
E8 to debug the board.
A 5V supply is required to power the LCD.
Some interfacing circuitry was made to perform the level shifting needed between the 3V3
R8C17 I 2 C lines and the 5V I 2 C interface on the LCD.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
The LCD Module
The LCD used for this application was a LCD216S made by Mindsensors; a picture of the LCD
is shown in figure 4. It has a 16 column by 2-line text display and a backlight which can be
turned ON/OFF via software. It is possible to communicate with the LCD module via RS232,
serial peripheral interface (SPI) or I 2 C.
The Pin connection for the LCD is shown in figure 4.
Figure 4: LCD top view and Pin Connection
The pins are as follows
Pin 1: +5V supply voltage for Module
Pin 2: Serial clock for I 2 C and SPI and Rx for RS232
Pin 3: GND connection for Module and reference for data communication
Pin 4: No connects
Pin 5: Serial Data in for I 2 C and SPI
Pin 6: No connects
Pin 7: CS\ for SPI and RS232
When the LCD is first powered from a 5V power supply, it is configured for I 2 C
communications with the slave address 0xE0. A setup switch is provided on the LCD module for
selection and configuration of communication interface. To enter the setup interface on the LCD
module, the setup switch should be pressed whilst the power is cycled until “Setup” appears on
the display. When the switch is released, the LCD will display the current communication
interface settings. The desired interface may then be selected by pressing the set up switch
repeatedly if required. When the correct communication settings are displayed, the module
should be powered down. The module will then power up in the new communication settings.
Once the LCD is appropriately set up for communication, characters may be displayed on the
LCD by sending the characters' ASCII value to the LCD. Table 1 below shows the relationship
of the value sent to the LCD and the character displayed on the LCD.
The LCD also has a number of commands which may be used to move the cursor, show the
cursor, clear the screen, turn the backlight On/OFF etc. All the commands start 0xFE (this is
blank in the character table) which is then immediately followed by the command number.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Table 1: Relationship between the data value sent to LCD and the character displayed.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Hardware Setup Using I 2 C Communication
The R8C17 device is operable from the 3V3 supply, however the LCD requires 5V CMOS levels
at its I 2 C pins. Some hardware interface is therefore required to perform the voltage translation
between the LCD and R8C17 device. The following figure 5 shows this hardware interface.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Figure 5: Hardware interface for I 2 C Communication between LCD and R8C17 device.
The device used for performing the level shifting is a P82B96. This is designed for I 2 C
communications up to 400KHz. For this purpose it is possible to connect the Rx and Tx lines
together and connect this to one of the I 2 C communication lines. Other I 2 C applications may
require that they be kept separate. The P82B96 requires that one side of the I 2 C lines operates
from 5V. The other side may operate from any voltage between 2 and 15V. For this application
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R8C/17 IIC Sample Project (Using HEW4 and E8)
we require the LCD I 2 C communications to be at a 5V level and the R8C17 I 2 C communications
to be at a 3V3 level. Therefore the VCC level of the P82B96 is set to 3V3 volts.
The SDA and SCL lines on the microcontroller side are pulled to the 3V3 power supply via 4K7
resistors. This is a requirement of I 2 C communications, as the devices pulls the line low when
required. Similarly, therefore, the SDA and SCL lines on the LCD side also have 4K7 resistors
which pull these lines to 5V. Figure 6 is a picture of the board used as the I 2 C interface
Figure 6: I 2 C Interface Board
5V I/P Line
3V3 I/P Line
LCD Connector
GND Line
P82B96
LCD Support
Pull Up Resistors
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R8C/17 IIC Sample Project (Using HEW4 and E8)
The I 2 C Peripheral
• I 2 C bus format
- Selectable for master / slave device
- Continuous transmit/receive (shift, transmit and receive registers are independent)
- Start / stop conditions are automatically generated in master mode
- Automatic loading of acknowledge bit when transmit
- Bit synchronization/wait function
- Direct drive of the SCL and SDA pins (NMOS open drain output) is enabled
• Clock Synchronous Serial Format
- Continuous transmit/receive (shift, transmit and receive registers are independent)
- Selectable for master / slave device
- Start / stop conditions are automatically generated in master mode
- Automatic loading of acknowledge bit when transmit
- Bit synchronization / wait function.
- Direct drive of the SCL and SDA pins (NMOS open drain output) is enabled
• Detects overrun error (clock synchronous serial format)
• I 2 C bus format 6 types of interrupt error
- Transmit data empty, transmit ends, receive data full, arbitration lost, NACK detection
and stop condition detection.
• Clock synchronous serial format 4 types of interrupt error
- Transmit data empty, transmit ends, receive data full and overrun error
• Clock synchronous serial format
- Selectable for the MSB-first or LSB-first to the data transfer direction
A block diagram of the I 2 C peripheral is shown in the following figure 7
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Figure 7: I 2 C Block Diagram
The ICCR1 register enables the I 2 C peripheral, sets the clock rate and the operation mode. The
ICCR2 register contains the busy bit, a I 2 C reset bit, start/stop generation bit and determines the
SDA/SCL pin values after a read or write. The ICMR register determines MSB or LSB first
transmission, contains a bit counter and a wait bit for wait insertion. The SAR register contains
the slave address for the R8C17 device when it acts as a slave. This register also sets whether the
peripheral is the I 2 C format or the clock synchronous format. The ICIER register enables the I 2 C
interrupts while the ICSSR holds the status of these interrupts (flags). The IICDRT stores
transmit data, which is then transferred to the ICDRS (shift) register. The ICDRR stores any
received data.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
1. ICCR1 & 2 Bus Control Registers H’00B8 & H’00B9
ICCR1:
7
6 5 4 3 2 1 0
ICE
RCVD
MST
TRS
CKS3
CKS2
CKS1
CKS0
Initial Value:
Read/Write:
0
R/W
0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W
ICCR2:
7
6 5 4 3 2 1 0
BBSY
SCP
SDAO
SDAOP
SCLO
-
ICCRST
-
Initial Value:
Read/Write:
0
R/W
1 1 1 1 1 0 1
R/W R/W R/W R0 - R/W -
Bit 7:
ICE – Bus Busy Bit
0: I 2 C module is halted
1: I 2 C module is enabled
Bit 6:
RCVD – Receive Disable bit
0: Enables receive operation
1: Disables receive operation
Bit [5:4] MST – Master/Slave Device Select bit
TRS – Transmit /Receive select bit
MST TRS Mode
0 0 Slave Receive mode
0 1 Slave Transmit mode
1 0 Master Receive mode
1 1 Master Transmit mode
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Bit [3:0]:
CKS[3:0] - Transmit Clock Select bits
CKS3 CKS2 CKS1 CKS0 Transfer Rate
0 0 0 0 f1/28
0 0 0 1 f1/40
0 0 1 0 f1/48
0 0 1 1 f1/64
0 1 0 0 f1/80
0 1 0 1 f1/100
0 1 1 0 f1/112
0 1 1 1 f1/128
1 0 0 0 f1/56
1 0 0 1 f1/80
1 0 1 0 f1/96
1 0 1 1 f1/128
1 1 0 0 f1/160
1 1 0 1 f1/200
1 1 1 0 f1/224
1 1 1 1 f1/256
Bit 7:
BBSY – Bus Busy Bit
0: The bus in in a released state
1: The bus is occupied
Bit 6:
SCP – Start/Stop Condition
Write a "0" to this bit simultaneously with the BBSY bit to generate a start bit.
Bit 5:
SDAO – SDA Output Value Control bit
0: Read; SDA pin is held low, Write; SDA pin is changed to low
1: Read; SDA pin is held high, Write; SDA pin is changed to high
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Bit 4:
SDAOP – SDAO Write Protect bit
When rewrite to SDAO bit, write "0" simultaneously.
Bit 3:
SCLO – SCL Monitor Flag
0: SCL pin is set to Low
1: SCL pin is set to high
Bit 2:
Reserved
Bit 1:
Bit 0:
ICCRST – I 2 C Control Part Reset bit
When hang up occurs due to communication failure during I 2 C bus interface
operation, write a "1" to reset the control part of the I 2 C bus interface without
setting port and initialisaing all the registers.
Reserved
2. ICMR – I 2 C Bus Mode Register H’00BA
7
6 5 4 3 2 1 0
MLS
WAIT
-
-
BCWP
BC2
BC1
BC0
Initial Value:
Read/Write:
0
R/W
0 0 1 1 0 0 0
R/W R/W - R/W R/W R/W R/W
Bit 7:
MLS - MSB First / LSB First Select bit
0: Transfers data MSB first
1: Transfers data LSB first
Bit 6:
WAIT - SSCK Clock Polarity Select bit
0: "H" when clock stops
1; "L" when clock stops
Bit [5:4]:
Reserved
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Bit 3:
BCWP – BC Write Protect Bit
Bit [2:0]: BC[2:0] - Bit counter 2 to 0
Clock Synchronous Format
I 2 C Bus FOrmat
BC2 BC1 BC0 Bits left BC2 BC1 BC0 Bits left
0 0 0 8 bit 0 0 0 9 bits
0 0 1 1 bit 0 0 1 2 bits
0 1 0 2 bit 0 1 0 3 bits
0 1 1 3 bit 0 1 1 4 bits
1 0 0 4 bit 1 0 0 5 bits
1 0 1 5 bit 1 0 1 6 bits
1 1 0 6 bit 1 1 0 7 bits
1 1 1 7 bit 1 1 1 8 bits
3. ICIER – I 2 C Bus Intertrupt Enable Register H’00BB
7
6 5 4 3 2 1 0
TIE
TEIE
RIE
NAKIE
STIE
ACKE
ACKBR
ACKBT
Initial Value:
Read/Write:
Bit 7:
0
R/W
0 0 0 0 0 0 0
R/W R/W R/W R/W R/W RO R/W
TIE – Transmit Interrupt Enable bit
0: Transmit Interrupt is disabled
1: Transmit Interrupt enabled
Bit 6:
TEIE – Transmit End Interrupt Enable bit
0: Transmit End Interrupt is disabled
1; Transmit End Interrupt is enabled
Bit 5:
RIE – Receive Interrupt Enable bit
0: Receive Interrupt is disabled
1: Receive Interrupt is enabled
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Bit 4:
NAKIE – NACK Receive Interrupt Enable Bit
0: Disables NACK receive interrupt request
1: Enables NACK receive interrupt request
Bit 3:
STIE – Stop Condition Detection Interrupt Enable
0: Disables stop condition detection interrupt enable bit
1: Enables stop condition detection interrupt enable bit
Bit 2:
ACKE – Acknowledge Bit
0: Value of receive acknowledge bit is ignored
1: Receive acknowledge bit is set to "1", continuous transfer is halted.
Bit 1:
ACKBR – Receive Acknowledge Bit
0: Acknowledge bit received from receive device in transmit mode is set to 0
1: Acknowledge bit received from receive device in transmit mode is set to 1
Bit 0:
ACKBT – Transmit Acknowledge Bit
0: 0 is transmitted as acknowledge bit in receive mdoe
1: 1 is tranmsitted as acknowledge bit in receive mode
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R8C/17 IIC Sample Project (Using HEW4 and E8)
4. ICSR – I 2 C Bus Status Register H’00BC
7
6 5 4 3 2 1 0
TDRE
TEND
RDRF
NACKF
STOP
AL
AAS
ADZ
Initial Value:
Read/Write:
0
R/W
0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W
Bit 7: TDRE – Transmit Data Empty
The following conditions set this flag:
• Data is transferred from ICDRT to ICDRS registers and ICDRT register is empty
• When setting the TRS bit in the ICCR1 register to “1” (transmit mode)
• When generating the start condition (including retransmit)
• When changing from slave receive mode to slave transmit mode
Bit 6: TEND – Transmit End
The following conditions set this flag:
• When the 9th clock of the SCL signal w ith the I2C bus format w hile the TDRE bit is
set to “1”, this flag is set to “1”
• When the final bit of the transmit frame is transmitted w ith the clock synchronous
format.
Bit 5:
RDRF – Receive Data Register Full
This flag is set when receive data is transferred from ICDRS to ICDRR registers.
Bit 4:
NACKF – No Acknowledge Detection Flag
This flag is set to 1 when no ACKnow ledge is detected from receive
Bit 3:
STOP – Stop Condition Detection Flag
This flag is set to 1 when the stop condition is detected after the frame is
transferred
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Bit 2: AL – Overrun Error Flag
When the I 2 C bus format is used, this flag indicates that arbitration is lost in master mode. In the
following case, this flag is set to “1”
• When the internal SDA signal and SDA pin level do not match at the rise of the SCL signal
in master transmit mode
• When the start condition is detected and the SDA pin is held “H” in master transmit / receive
mode.
This flag indicates that an overrun error occurs when the clock synchronous format is used
In the follow ing case, this flag is set to “1”.
• When the last bit of the follow ing data is received w hile the RDRF bit is set to 1.
Bit 1: AAS - Slave Address Recognition Flag
This flag is set to “1” w hen the first frame following start condition matches the SVA0 to SVA6
bits in the SAR register in slave receive mode. (Detect the slave address and generate call
address).
Bit 0: ADZ – General Call Address Recognition Flag
When detecting the general call address, this flag is set to “1”.
5. SAR – Slave Address Register H’00BD
7
6 5 4 3 2 1 0
SVA6
SVA5
SVA4
SVA3
SVA2
SVA1
SVA0
FS
Initial Value:
Read/Write:
0
R/W
0 0 0 0 0 0 0
R/W R/W R/W R/W R/W R/W R/W
Bit [7:1]: SVA[6:2] – Slave address 6:0
Set the different address from the other slave devices which are connected to the I2C bus. When
the 7 high-order bits of the first frame transmitted after the starting condition match the SVA0 to
SVA6 bits in slave mode of the I2C bus format, the microcomputer operates as a slave device.
Bit 0:
FS – Format Select Bit
0: I 2 C bus format
1: Clock synchronous serial format
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R8C/17 IIC Sample Project (Using HEW4 and E8)
6. ICDRT – I 2 C Bus Transmit Data Register H’00BE
This register store the transmit data. When detecting that the ICDRS register is empty, the stored
transmit data is transferred to the ICDRS register and the starts transmit data. When the next
transmit data is written to the ICDRT register during transmitting the data of the ICDRS register,
continuous transmit is enabled. When the MLS bit in the ICMR register is set to “1” (data
transferred by LSB-first) and after the data is written to the ICDRT register, the MSB and LSB
inverted data is read.
7. ICDRR – I 2 C Bus Receive Data Register H’00BF
This register stores any received data. When the ICDRS register receives 1-byte data, the
receive data is transferred to the ICDRR register and the next receive is enabled.
8. ICDRS – I 2 C Bus Shift Register
This register is used to transmit and receive data. The transmit data is transferred from the
ICRDT to ICDRS registers and data is transmitted from the SDA pin when transmitting. When
1-byte data is received, data is transferred from the ICDRS to ICDRR registers when receiving.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Software Description for demonstration.
9. Code Purpose
The software for this application is designed to demonstrate the I 2 C interface of the R8C17.
10. External code operation
The software runs on MBR8C17. When the code starts to execute Led 2 will flash, which
notifies the user that the board is functional. The I 2 C peripheral is then initialised and then starts
to communicate with the LCD. The phrase "R8C17" is then displayed on the screen repeatedly.
11. R8C17 Workspace
The workspace when opened within HEW4 will appear as figure 8.
Figure 8: Workspace view
File Names and Purposes
“R8C17.c”: Contains the main function called “main.c”. This function performs some system
initialisations and runs the infinite loop for writing to the LCD. It also holds the LED control
functions.
“R8C17_IIC.c”: Contains all the I 2 C initialisation and communication functions.
“ncrt0.a30”: An assembly file for performing some system setups to do with memory and stack.
Sets entry into main function.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
12. Code Functions
Void main(void)
When the R8C17 comes out of reset the assembler code in ncrt0.a30 is run and entry into the
main function occurs. The code for the main function is shown below.
The first function performed by main is to switch the CPU clock from the on chip low speed
oscillator to the high speed on chip oscillator. This enables the I 2 C interface to be used.
LED 2 is then flashed to show that the board has successfully been reset and is working as
expected.
The I 2 C peripheral is then initialised for communication with the LCD. The code then enters an
infinite for loop. This loop continuously performs the following functions:
1. Writes a command via the I 2 C to the LCD to send the LCD cursor home. Any character
now written to the LCD will be displayed in the top left corner of the glass.
2. Writes a command to switch off the blinking cursor
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R8C/17 IIC Sample Project (Using HEW4 and E8)
3. Writes a command to clear the LCD screen
4. The characters "R8C17." are then written sequentially to the LCD via the I 2 C interface.
A delay is present between each command and to ensure that the LCD has sufficient
time to execute the previous command or to write the previous character to the screen.
Void switch_main_clock(void)
The code used to switch the device clock from the low speed on chip oscillator to the high speed
on chip oscillator is shown below
Firstly the protect bit, PRC0, is switched off to allow settings to be made to the system clock and
oscillation registers. The CM06 bit is then set to 1 to allow settings to be made for the CM16 and
CM17 bits. These bits are then set to no division mode. The HRA00 bit is then set to enable the
on chip oscillator and is followed by a few nops to give it time to settle. The high-speed
oscillator is then selected by setting HRA01. CM06 is the cleared and the PRC0 protect bit is
cleared. Any attempt to write to the system clock and oscillation registers is now invalid.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
void init_leds(void)
The code used to initialise the port pins connected to LED 1 and LED 2 on the MBR8C17 is
shown below:
Firstly the data port pins are cleared to 0. This will turn on the LED's when the direction registers
are set as current is sunk by the device through the LED's. The direction register bits for the LED
port pins are then set to 1 for output.
void Flash_Led2(void)
This function flashes LED2 10 times.
Two loop variables are first declared, these being i and j. The first loop determines how
many times the LED flashes and is set to ten times. The second and third loops determine
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R8C/17 IIC Sample Project (Using HEW4 and E8)
how long the LED is on and off for during the flash. These have to be long loops for the
flash to be observable.
Void Delay(void)
The function Delay() is used to give the LCD time to recover from commands, writing
text to the screen.
This is a for loop which loops round for a period of time.
Init_IIC(void)
The initialisation procedure for the I 2 C peripheral is shown in the following code. This function
performs the initialisation of the I 2 C peripheral in order that the R8C17 device may write bytes
onto the I 2 C bus. The I 2 C bus consists of two signals, SCL and SDA. The SDA lines is used for
the device to write data onto. The clock signal SCL is used to determine the timing to read/place
the data on the I 2 C bus.
Firstly the IICR1 register is setup to enable the I 2 C interface and set the transfer clock rate. In
this case the value 0100 is used which corresponds to 100KHz with an 8MHz oscillator. The
ICMR register is then written to ensure MSB first transmission and for no wait bit. The ICIER is
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R8C/17 IIC Sample Project (Using HEW4 and E8)
cleared to ensure no interrupts are enabled and all the flags are cleared in ICSR. The code then
waits for the BBSY flag to clear (i.e. it waits for the I 2 C bus to be released).
void Write_bytes(void)
This function transmits two bytes of data on the I 2 C bus to the LCD.
The code sets the MST and TRS bit so that the I 2 C peripheral is in master transmit mode. A start
condition may then be issued by writing a 1 and a 0 to the BBST and SCP bits respectively. The
slave address may then be placed in the ICDRT register ready for transmission. In this case the
data should only be transmitted to the LCD and not received from the LCD so the read/write part
of the slave address (this is the last bit of the slave address value) is 0. The code then waits for
the TEND flag in ICSR to become set, i.e. for the transmission of the slave address to finish. The
first byte of data is then placed in the ICDRT register and the code waits for this to be
transmitted. The last byte of data is then passed to the Write_data_End function.
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R8C/17 IIC Sample Project (Using HEW4 and E8)
Write_data_end()
The Write_data_End function writes the last byte of data to be transmitted to the I 2 C interface.
The last byte is put in the ICDRT register ready for transmission. The code then waits for the
TEND flag to be set, which is then cleared for safety. The stop bit is then cleared and a stop
condition is issued on the I 2 C bus by clearing SCP and BBSY. The transmit and master bits are
cleared along with the TDRE flag.
Conclusion
The I 2 C peripheral of the R8C17 was successfully demonstrated using the Micon Board R8C17
and an LCD. Some interfacing circuitry was used to connect the MBR8C17 with the LCD. Code
was written which flashed LED 2 of the micon board and displayed "R8C17" on the LCD.
Application Note 199/1.0 July 2005 Page 29 of 30

R8C/17 IIC Sample Project (Using HEW4 and E8)
Cautions
Keep safety first in your circuit designs!
• Renesas Technology Corporation puts the maximum effort into making semiconductor products better and
more reliable, but there is always the possibility that trouble may occur with them. Trouble with
semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures
such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention
against any malfunction or mishap.
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Application Note 199/1.0 July 2005 Page 30 of 30