UHF ASK/FSK Receiver ATA3745 - Atmel Corporation

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Most applications are dominated by two transmission frequencies: f Send = 315 MHz is mainly used in the USA, f Send = 433.92 MHz in Europe. In order to ease the usage of all T Clk -dependent parameters, the electrical characteristics display three conditions for each parameter. • USA applications (f XTO = 4.90625 MHz, MODE = L, T Clk = 2.0383 µs) • European applications (f XTO = 6.76438 MHz, MODE = H, T Clk = 2.0697 µs) • Other applications (T Clk is dependent on f XTO and on the logical state of pin MODE. The electrical characteristic is given as a function of T Clk ). The clock cycle of some function blocks depends on the selected baud rate range (BR_Range) which is defined in the OPMODE register. This clock cycle T XClk is defined by the following formulas for further reference: BR_Range = BR_Range0: T XClk = 8 T Clk BR_Range1: BR_Range2: BR_Range3: T XClk = 4 T Clk T XClk = 2 T Clk T XClk = 1 T Clk 5.2 Polling Mode According to Figure 3-2 on page 6, the receiver stays in polling mode in a continuous cycle of three different modes. In sleep mode, the signal processing circuitry is disabled for the time period T Sleep while consuming low current of I S =I Soff . During the start-up period, T Startup , all signal processing circuits are enabled and settled. In the following bit check mode, the incoming data stream is analyzed bit by bit looking for a valid transmitter signal. If no valid signal is present, the receiver is set back to sleep mode after the period T Bitcheck . This period varies check by check as it is a statistical process. An average value for T Bitcheck is given in the section “Electrical Characteristics” on page 23. During T Startup and T Bitcheck the current consumption is I S =I Son . The average current consumption in polling mode is dependent on the duty cycle of the active mode and can be calculated as: I Soff T Sleep + I Son T Startup + T Bitcheck I Spoll = ---------------------------------------------------------------------------------------------------------- T Sleep + T Startup + T Bitcheck During T Sleep and T Startup , the receiver is not sensitive to a transmitter signal. To guarantee the reception of a transmitted command, the transmitter must start the telegram with an adequate preburst. The required length of the preburst is dependent on the polling parameters T Sleep , T Startup , T Bitcheck and the startup time of a connected microcontroller (T Start_µC ). T Bitcheck thus depends on the actual bit rate and the number of bits (N Bitcheck ) to be tested. The following formula indicates how to calculate the preburst length. T Preburst T Sleep + T Startup + T Bitcheck + T Start_C 10 <strong>ATA3745</strong> 4901B–RKE–11/07
<strong>ATA3745</strong> 5.2.1 Sleep Mode The length of period T Sleep is defined by the 5-bit word Sleep of the OPMODE register, the extension factor X Sleep described inTable 5-8 on page 20, and the basic clock cycle T Clk . It is calculated to be: T Sleep = Sleep X Sleep 1024 T Clk In US and European applications, the maximum value of T Sleep is about 60 ms if X Sleep is set to 1. The time resolution is about 2 ms in that case. The sleep time can be extended to almost half a second by setting X Sleep to 8. X Sleep can be set to 8 by bit X SleepStd or by bit X SleepTemp , resulting in a different mode of action as described below: X SleepStd = 1 implies the standard extension factor. The sleep time is always extended. X SleepTemp = 1 implies the temporary extension factor. The extended sleep time is used as long as every bit check is OK. If the bit check fails once, this bit is set back to 0 automatically, resulting in a regular sleep time. This functionality can be used to save current in presence of a modulated disturber similar to an expected transmitter signal. The connected microcontroller is rarely activated in that condition. If the disturber disappears, the receiver switches back to regular polling and is again sensitive to appropriate transmitter signals. Table 5-6 on page 19 shows how the highest register value of Sleep sets the receiver to a permanent sleep condition. The receiver remains in that condition until another value for Sleep is programmed into the OPMODE register. This function is desirable where several devices share a single data line. 4901B–RKE–11/07 11
Page 1 and 2: Features • Supply Voltage 4.5V to
Page 3 and 4: ATA3745 2. Pin Configuration Figure
Page 5 and 6: ATA3745 To determine f LO , the con
Page 7 and 8: ATA3745 4. Analog Signal Processing
Page 9: ATA3745 5. Polling Circuit and Cont
Page 13 and 14: ATA3745 5.3 Bit Check Mode In bit c
Page 15 and 16: ATA3745 5.3.2 Duration of the Bit C
Page 17 and 18: ATA3745 Figure 5-11. Timing Diagram
Page 19 and 20: ATA3745 Table 5-3. Baud1 Effect of
Page 21 and 22: ATA3745 5.5.1 Conservation of the R
Page 23 and 24: ATA3745 6. Absolute Maximum Ratings
Page 25 and 26: ATA3745 8. Electrical Characteristi
Page 27 and 28: ATA3745 9. Electrical Characteristi
Page 29 and 30: ATA3745 10. Ordering Information Ex

UHF ASK/FSK Receiver ATA3745 - Atmel Corporation

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