Lecture 9 - Åbo Akademi

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Novel Interconnect Paradigms for Multicore designs Optical Interconnects Three Dimensional Integration Wireless/RF Interconnects High Bandwidth and Low Energy Dissipation 68 68
Motivation • Modern on-chip electrical interconnects (EIs) are realized using copper wires • On-chip EIs can be classified into two categories • local interconnects: used for short distance communication, delay of less than a clock cycle • global interconnects: fewer in number, used for long distance communication, delay spanning multiple cycles • Long global EIs typically have high RC constants • which results in greater propagation delay, transition time, and crosstalk noise • Repeater insertion and increasing wire width can reduce the propagation delay somewhat
Page 1 and 2:
Special Course in Computer Science:
Page 3 and 4:
Network-on-Chip (NoC) Why NoC OCP S
Page 5 and 6:
From simpler to more complex chips
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Problems to solve • Cores that pe
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Some driving forces • Technical I
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NoC illustration
Page 14 and 15:
OCP standard for on-chip communicat
Page 16 and 17:
OCP Characteristics • IP Core •
Page 18 and 19: Flexibility of OCP • Several usef
Page 20 and 21: Some fundamental OCP concepts: Addr
Page 22 and 23: Some fundamental OCP concepts: In-b
Page 24 and 25: Some fundamental OCP concepts: Side
Page 26 and 27: Introduction • Network-on-chip (N
Page 28 and 29: Introduction • ISO/OSI network pr
Page 30 and 31: NoC Topology • Most direct networ
Page 32 and 33: NoC Topology • Folding torus topo
Page 34 and 35: NoC Topology • Indirect Topologie
Page 36 and 37: NoC Topology • (m, n, r) symmetri
Page 38 and 39: NoC Topology • Irregular or ad ho
Page 40 and 41: Switching strategies • Two main m
Page 42 and 43: Switching strategies • Allocating
Page 44 and 45: Switching strategies • VCT (virtu
Page 46 and 47: Routing algorithms • Static and d
Page 48 and 49: Routing algorithms • Minimal and
Page 50 and 51: Routing algorithms • Routing algo
Page 52 and 53: ACK/NACK flow control scheme • wh
Page 54 and 55: Clocking schemes • Fully synchron
Page 56 and 57: NoC Architectures examples
Page 58 and 59: HERMES • Developed at the Faculda
Page 60 and 61: Nostrum • Developed at KTH in Sto
Page 62 and 63: QNoC • Developed at Technion in I
Page 64 and 65: SPIN • Scalable programmable inte
Page 66 and 67: Emerging NoC paradigms Overall goal
Page 70 and 71: Motivation • Increasingly harder
Page 72 and 73: Emerging Alternatives • Optical I
Page 74 and 75: Optical Interconnects • Board-to-
Page 76 and 77: Optical Interconnects • Waveguide
Page 78 and 79: Optical Interconnects • OIs have
Page 80 and 81: Optical Interconnects: Open Problem
Page 82 and 83: RF/Wireless Interconnects • Micro
Page 84 and 85: RF/Wireless Interconnects • Paths
Page 86 and 87: RF/Wireless Interconnects: Open Pro
Page 88 and 89: CNT Interconnects • Carbon nanotu
Page 90 and 91: Multi-Wall Carbon Nanotubes (MWCNT)
Page 94 and 95: Conceptual transmitter and receiver
Page 98 and 99: 3D and NoCs • 3D stacking technol
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Lecture 9 - Åbo Akademi

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