ÇUKUROVA UNIVERSITY INSTITUTE OF NATURAL AND APPLIED ...
ÇUKUROVA UNIVERSITY INSTITUTE OF NATURAL AND APPLIED ...
ÇUKUROVA UNIVERSITY INSTITUTE OF NATURAL AND APPLIED ...
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4. MODELING <strong>OF</strong> PROPOSED DVR Mustafa İNCİ<br />
Among the different topologies of multilevel converters, the most popular<br />
are: diode clamped inverters, flying-capacitor inverters, and cascade H-bridge<br />
inverters(Patil et al., 2012). An m-level diode-clamped multilevel inverter typically<br />
consists of m-1 capacitors on the dc bus and produces m levels of the phase<br />
voltage(Ozdemir et al., 2007). Figure 4.3 presents a single-phase diode-clamped<br />
inverter with two three-level legs. In this case, the dc-link is composed of two<br />
capacitors. For proper modulation and to avoid excessive voltage on switches, the<br />
voltage on the dc-link capacitors should be the same(Stala,2011).<br />
V<br />
p<br />
= V N<br />
(4.1)<br />
Proposed topology consists of two capacitors on dc bus and generates fivevoltage<br />
levels of phase voltage in inverter. Inverter structure consists of three single<br />
phase five level diode clamped inverter for each phases. In this wise, it can<br />
compensate balanced and unbalanced voltage sag/swell. Also, each diode clamped<br />
inverter generates five voltage level (-Vdc, -0.5Vdc, 0, 0.5Vdc,Vdc). The voltage<br />
levels and their corresponding switch states of inverter for each five level diode<br />
clamped inverter are shown in Table 4.2. State condition 1 means the switch is ON,<br />
and state 0 means the switch is off.<br />
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