Performance of J-PARC Linac RF System - Spallation Neutron Source
Performance of J-PARC Linac RF System - Spallation Neutron Source
Performance of J-PARC Linac RF System - Spallation Neutron Source
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<strong>Performance</strong> <strong>of</strong><br />
J-<strong>PARC</strong> <strong>Linac</strong> <strong>RF</strong> system<br />
T. Kobayashi, E. Chishiro, S. Suzuki,<br />
Japan Atomic Energy Agency (JAEA), JAPAN<br />
S. Anami, Z. Fang, S. Michizono, S. Yamaguchi,<br />
High Energy Accelerator Research Organization (KEK), JAPAN
Outline<br />
1. Introduction (J-<strong>PARC</strong> and the <strong>Linac</strong>)<br />
2. Overview <strong>of</strong> the <strong>RF</strong> <strong>System</strong><br />
3. <strong>RF</strong> Reference Distribution <strong>System</strong><br />
4. Low Level <strong>RF</strong> system<br />
5. Digital Feedback Control <strong>System</strong><br />
6. <strong>System</strong> <strong>Performance</strong><br />
7. Summary
Introduction ..(1) -- J-<strong>PARC</strong> Facility<br />
400 MeV<br />
(RCS)<br />
(main ring, MR)<br />
The Japan Proton Accelerator Research Complex (J-<strong>PARC</strong>) will be one <strong>of</strong> the highest<br />
intensity proton accelerators in the world.<br />
It consists <strong>of</strong> a 400-Mev H – linac, a 3-GeV 1-MW rapid-cycling synchrotron (RCS),<br />
and a 50-GeV synchrotron (main ring, MR)
Introduction ..(2) -- J-<strong>PARC</strong> <strong>Linac</strong><br />
•- Accelerated particles: H - (negative hydrogen)<br />
•- Energy: 181 MeV (The last two SDTL tanks are used as debunchers)<br />
Upgraded to 400 MeV by using ACS cavity ( in 2011? )<br />
•- Peak current: 30 mA (50 mA for 1MW at 3GeV)<br />
•- Repetition: 25 Hz<br />
•- Pulse width: 500 us (Beam), 650 us (<strong>RF</strong> including cavity build-up time)<br />
•- Acceleration Frequency 324 MHz<br />
<strong>RF</strong>Q: Radio Frequency <strong>Linac</strong><br />
DTL: Drift Tube <strong>Linac</strong> (3 modules)<br />
SDTL: Separate-type Drift Tube <strong>Linac</strong> (15 modules)<br />
ACS: Annual Coupled Structure <strong>Linac</strong><br />
IS<br />
H - Ion<br />
<strong>Source</strong><br />
<strong>RF</strong>Q<br />
Buncher(x2)<br />
Chopper<br />
3MeV<br />
DTL<br />
50 MeV<br />
SDTL<br />
3m 3m<br />
MEBT1<br />
27m 91m<br />
Debuncher1<br />
181 MeV<br />
300m<br />
(Present State)<br />
L3BT<br />
Debuncher2<br />
3-Gev<br />
Synchrotron<br />
ACS Section for 400-MeV Upgrade<br />
(972MHz)
Introducton ..(3)<br />
History <strong>of</strong> the <strong>Linac</strong> Commissioning<br />
Oct. .2006: High-power operation <strong>of</strong> all the <strong>RF</strong> systems was started. All<br />
klystrons have successfully supplied power to the cavities.<br />
Nov. 2006: <strong>RF</strong>Q&MEBT-1 beam commissiong<br />
Dec. 2006: DTL beam commissiong.<br />
Jan. 2007: SDTL beam test. (rough tuning)<br />
Jan. 2007: 181-MeV acceleration <strong>of</strong> 5-mA (20us) beam succeeded!<br />
Feb. 2007: 181-MeV acceleration <strong>of</strong> 26-mA beam (50 us) was succeeded!<br />
~ Fine beam commissioning ~<br />
Jul. & Aug. 2007: Summer Shutdown<br />
Oct. 2007: Injection into 3-Gev Ring (RCS) !<br />
Now RCS commissioning is continued.
<strong>Linac</strong> <strong>RF</strong> <strong>System</strong><br />
• 181 MeV normal conducting proton linac<br />
• Operation frequency: 324 MHz<br />
• Total 20 klystrons (max.3 MW), 6 DCPS (#1~6)<br />
• <strong>RF</strong> Pulse width: 650 us (25Hz)<br />
Requirements <strong>of</strong> cavity field stability<br />
< +/-1% (amplitude), < +/-1 deg. (phase)<br />
Klystron Gallery
<strong>RF</strong> Reference Distribution <strong>System</strong><br />
312-MHz <strong>RF</strong> reference is distributed to all LL<strong>RF</strong> control systems through optical links.<br />
The reference signal is optically amplified and divided into 17 transfer lines, then furthermore it is<br />
divided into 5; one <strong>of</strong> them is returned back to the first station for phase monitor.<br />
Optical cable is the Phase Stabilized Optical Fiber (PSOF). (The thermal coefficient is 0.4 ppm/ºC.)<br />
Temperature <strong>of</strong> the optical components (E/O, O/E, cables, couplers) are controlled to be constant.
Installation <strong>of</strong> the Reference <strong>System</strong><br />
1x17 optical coupler<br />
set in an oven<br />
QuickTime and a<br />
TIFF (Uncompressed) decompressor<br />
are needed to see this picture.<br />
•Insulated duct set in the under-<br />
floor cable trench.<br />
•Cooling water temperature is<br />
controlled to be 29±0.1 deg. C<br />
Klystron Gallery<br />
Insulated Duct<br />
with Cooling Water Pipe<br />
An insulate duct is set in a cable trench under floor.<br />
Phase-Stabilized<br />
Optical Cables<br />
Optical Coupler<br />
Cross section <strong>of</strong> the under-floor cable trench<br />
Optical cables and Optical couplers are installed into the insulated duct<br />
with cooling water pipe for the temperature stabilization.
Measured the phase <strong>of</strong> returned signal from the end <strong>of</strong> the<br />
linac (L3BT building).<br />
Total about 800-m round trip transfer line.<br />
Phase trend<br />
for 4 days<br />
312MHz<br />
Round trip:<br />
Klystron Gallery<br />
(312MHz) Stability <strong>of</strong> <strong>RF</strong> Reference<br />
Stability Measured<br />
Result<br />
Spec.<br />
Gallery Temp. ±1.7 °C within ±2°C<br />
Phase <strong>of</strong> Ref. ±0.06° within ±0.3°<br />
Required stability is satisfied.
Low Level <strong>RF</strong> <strong>System</strong><br />
EPICS IO<br />
LL<strong>RF</strong> PLC<br />
cPCI FB system<br />
Interlock<br />
<strong>System</strong><br />
� One klystron supplies power 2 cavities in the SDTL section.<br />
� Digital FB system (FPGA & DSP) is used for the cavity field stabilization.<br />
� The FB system controls the vector sum <strong>of</strong> the 2 cavity fields.<br />
� The <strong>RF</strong> reference is 312-MHz optical signal (received by O/E converter) .<br />
� Cavity-tuners are controlled from the digital FB system by way <strong>of</strong> PLC.<br />
� Fast hardwire interlock is connected to <strong>RF</strong> switch outside the FB system.<br />
� Analog fast FB will be used for klystron FB loop if necessary. (It is optional.)
Klystron<br />
Low Level <strong>RF</strong> <strong>System</strong> ..(2)<br />
LL<strong>RF</strong> <strong>System</strong><br />
Klystron Gallery<br />
Digital FB <strong>System</strong> (cPCI)<br />
CPU<br />
I/O <strong>RF</strong>&CLK<br />
Mixer&I/Q<br />
DSP/FPGA<br />
Digital Analog<br />
cPCI<br />
Digital FB control system acts on a<br />
compact-PCI (cPCI) crate system.<br />
The FB and FF controls are performed by<br />
means <strong>of</strong> a combination <strong>of</strong> FPGA and DSP.
<strong>RF</strong>:324MHz<br />
LO:312MHz<br />
IF:12MHz<br />
Sampling:48MH<br />
z<br />
Digital FB Control <strong>System</strong><br />
cPCI digital FB system (FPGA & DSP)<br />
�generates standard signals (48 MHz and 324 MHz).<br />
�delivers I/Q modulated <strong>RF</strong> signals to 2 cavities.<br />
�receives <strong>RF</strong> signals from cavities and down-converts to IF signal (12 MHz).<br />
�samples the IF (12MHz) directly with 48 MHz.<br />
�controls the vector sum <strong>of</strong> 2 cavity fields (PI-control).<br />
IF signals are directly read by ADCs.<br />
The separated IQ signals are compared with set-tables and PI control is made with FF.
IQ Offsets Calibration <strong>of</strong> the IQ-modulator<br />
We found that<br />
the output <strong>of</strong> the IQ-modulator has<br />
<strong>of</strong>fsets for I/Q set value (as Red Circle in<br />
the figure).<br />
(Even if I and Q components set to 0, but the IQ-<br />
modulator still outputs a considerable signal.)<br />
In order to cancel this undesired output,<br />
we added I/Q <strong>of</strong>fsets to the DAC out.<br />
The <strong>of</strong>fset values were measured for all the<br />
LL<strong>RF</strong> systems.<br />
With calibration <strong>of</strong> the IQ <strong>of</strong>fsets,<br />
the performance <strong>of</strong> the IQ-modulator<br />
significantly improved (as Blue Circle)<br />
With phase scanning, the amplitude <strong>of</strong> IQ<br />
modulator output varies by less than 1%.<br />
0<br />
I<br />
-600 -500 -400 -300 -200 -100<br />
-100<br />
0 100 200 300 400<br />
IQ_out ( I_<strong>of</strong>fset = 0,<br />
Q_<strong>of</strong>fset = 0, REF = 100 )<br />
IQ_out ( I_<strong>of</strong>fset = 0,<br />
Q_<strong>of</strong>fset = 0, REF = 500 )<br />
IQ_out ( I_<strong>of</strong>fset = -84,<br />
Q_<strong>of</strong>fset = -223, REF = 100 )<br />
IQ_out ( I_<strong>of</strong>fset = -84,<br />
Q_<strong>of</strong>fset = -223, REF = 500 )<br />
Q<br />
400<br />
-200<br />
-300<br />
-400<br />
-500<br />
-600<br />
IQ modulator outputs at SDTL13 with<br />
or without IQ <strong>of</strong>fsetting.<br />
300<br />
200<br />
100
<strong>Performance</strong> <strong>of</strong> Feedback (FB) Control<br />
Cavity field stabilization (in 600-µs pulse)<br />
No FB Control with FB Control (Gain: P=5, I=5/1000)<br />
Amplitude Phase<br />
Amplitude Phase<br />
10%<br />
25 deg.<br />
25-degree phase sag is due to<br />
about 3.4% sag <strong>of</strong> the Klystoron<br />
DC voltage.<br />
Klystron Cathode<br />
Voltage<br />
QuickTime and a<br />
TIFF (PackBits) decompressor<br />
are needed to see this picture.<br />
3.4% sag<br />
±1%<br />
20-µs, 5-mA Beam<br />
±1 deg.<br />
Amplitude and phase are stabilized<br />
to be less than ±0.15% and ±0.15<br />
degrees, respectively.<br />
Beam loading (rising/falling ripple) is completely compensated with feed-forward<br />
control .
Temp. Gallery Temp. [deg. C] C]<br />
Long Term Stability<br />
The stability <strong>of</strong> the FB system in long-duration operation was evaluated.<br />
The trends <strong>of</strong> the amplitude and phase <strong>of</strong> the DTL2 Cavity (Input Power 1MW) were<br />
measured by external monitor (independent <strong>of</strong> FB system) for 2 days<br />
Drift [%]<br />
Drift [deg.]<br />
24.0<br />
23.5<br />
23.0<br />
22.5<br />
22.0<br />
Amplitude (<strong>RF</strong> Detector)<br />
Phase<br />
(Mixer-out around zero cross)<br />
Gallery Temperature<br />
[deg. C]<br />
0 5 10 15 20 25 30 35 40 45<br />
Time [hours]<br />
±1%<br />
±1deg.<br />
( during 2 days.)<br />
Amplitude drift is ±0.15%.<br />
Phase drift is ±0.15 degrees.<br />
These results are including characteristics<br />
<strong>of</strong> measurement system (detector, mixer<br />
and so on).<br />
Therefore, cavity field is maybe more stable<br />
than observed values.
Cavity-Amplitude [a. u.]<br />
4100<br />
4000<br />
3900<br />
3800<br />
3700<br />
Beam Loading Compensation<br />
with Feed-forward (FF) control<br />
No FF control<br />
Cavity-Amplitude<br />
+/- 2.7%<br />
Beam Start<br />
@DTL2<br />
Beam Loading<br />
50 μs, 26 mA<br />
3600<br />
-130.0<br />
200 250 300 350 400 450 500<br />
Time [μs]<br />
+/- 1.5 deg.<br />
Cavity-Phase<br />
-120.0<br />
-122.0<br />
-124.0<br />
-126.0<br />
-128.0<br />
Cavity-Phase [degrees]<br />
Beam Loading in DTL cavity field with<br />
only FB control.<br />
Peak Current: 26 mA, Pulse width: 50 us,<br />
The amplitude change: ±2.7% ,<br />
Phase Change: ±1.5 degrees<br />
Cavity-Amplitude [a. u.]<br />
4100<br />
4000<br />
3900<br />
3800<br />
3700<br />
with FF control<br />
Cavity-Amplitude<br />
50-μs, 26-mA Beam<br />
±0.2 deg.<br />
Beam Start<br />
Cavity-Phase<br />
-120.0<br />
-122.0<br />
-124.0<br />
-126.0<br />
-128.0<br />
3600<br />
-130.0<br />
4000<br />
200 250 300 350 400 450DAC Out - 500 Amplitude<br />
Time [μs]<br />
@DTL2<br />
±0.2%<br />
Cavity-Phase [degrees]<br />
2000<br />
-120<br />
200 300 400 500<br />
Time [μs]<br />
By using the FF control<br />
the beam loading was successfully compensated.<br />
(Amplitude change: ±0.2% , Phase change: ±0.2 deg.)<br />
However, it is necessary to adjust a timing <strong>of</strong> a<br />
control gate by 0.1-us step for optimization.<br />
Optimum values <strong>of</strong> the FF amplitude and phase depend on<br />
beam current.<br />
DAC Output - Amplitude [a. u.]<br />
5000<br />
3000<br />
DAC Output<br />
-90<br />
-100<br />
-110<br />
DAC Out - Phase<br />
DAC Out - Phase [degrees]
Summary<br />
� High power operation was started in October 2006.<br />
� <strong>RF</strong> control systems are working well without fatal problem.<br />
� the 181-MeV acceleration was succeeded in January 2007.<br />
� The digital FB control system is performing according to the<br />
expectation.<br />
� Required stability is satisfied in duration <strong>of</strong> <strong>RF</strong> pulse and in<br />
running operation. (Amplitude change: < ±0.2%, Phase change <strong>of</strong><br />
<strong>RF</strong> reference:
Introduction (3) -- J-<strong>PARC</strong> <strong>Linac</strong><br />
Accelerated particles:H - (negative hydrogen)<br />
Energy: 400 MeV for 3-Gev Synchroton<br />
600 MeV for Accelerator ADS<br />
Peak current: 50 mA<br />
Repetition: 50 Hz (including 25 Hz for ADS application)<br />
Pulse width: 500 us (Beam), 650 us (<strong>RF</strong>)<br />
Acceleration Frequency 324 MHz (~191MeV) , 972 MHz (~400 MHz)<br />
IS<br />
H- Ion<br />
<strong>Source</strong><br />
<strong>RF</strong>Q: Radio Frequency <strong>Linac</strong><br />
DTL: Drift Tube <strong>Linac</strong> (3 modules)<br />
SDTL: Separate-type Drift Tube <strong>Linac</strong> (15 modules)<br />
ACS: Annual Coupled Structure <strong>Linac</strong><br />
SCL: Super Conducting Cavity <strong>Linac</strong><br />
<strong>RF</strong>Q<br />
MEBT1<br />
Buncher(x2)<br />
Chopper<br />
3MeV<br />
324 MHz<br />
DTL<br />
50 MeV<br />
Buncher(x2)<br />
972 MHz<br />
SDTL ACS<br />
16m<br />
3m 3m 27m 91m 108m<br />
191 MeV 400 MeV<br />
300m<br />
MEBT2<br />
(Final Design)<br />
L3BT<br />
3-Gev<br />
Synchrotron<br />
Debuncher<br />
SCC<br />
(Phase II) 600 MeV<br />
972 MHz<br />
ADS
Digital FB Control <strong>System</strong> (Apendix)<br />
CPU<br />
I/O<br />
<strong>RF</strong>&CLK<br />
Mixer&I/Q<br />
DSP/FPGA<br />
Digital Analog<br />
cPCI is adopted for the crate.<br />
FPGA based digital FB system<br />
FPGA: Mezzanine card <strong>of</strong> the<br />
commercial DSP board<br />
� 2-FPGAs (2x VirtexII 2000) are installed<br />
with 4x14bit-ADCs and4x14bit-DACs at<br />
48 MHz sampling<br />
� DSP board enables to calculate complex<br />
diagnostics such as cavity control.<br />
� FPGAs are used only for fast feedback.