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weak inversion in analog and digital circuits - Lund Institute of ...

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Weak <strong><strong>in</strong>version</strong><br />

STABLE STATES OF CMOS FLIP-FLOP<br />

• Simplify<strong>in</strong>g assumptions: n n =n p =n, I 0n =I 0p =I 0<br />

• Normalized voltages v k =V k /U T<br />

high <strong>and</strong> low logic states<br />

8<br />

6<br />

4<br />

2<br />

v B<br />

n=1.6<br />

sw<strong>in</strong>g<br />

stable<br />

stable<br />

0 2 4 6<br />

v H (high)<br />

metastable<br />

v L (low)<br />

normalized supply voltage v B<br />

8<br />

CSEM, E. Vittoz, 2003<br />

V i<br />

<strong>in</strong>verter<br />

I p<br />

I n<br />

C<br />

V o<br />

page 20<br />

V B<br />

• bistable for V B > 1.91U T<br />

• 95% sw<strong>in</strong>g for V B = 4U T<br />

V+<br />

V

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